Add predefined __ROMSTAGE__ and __RAMSTAGE__ macros

This patch adds the macros __ROMSTAGE__ and __RAMSTAGE__ which get
predefined in their respective stages by make, so that we have one
specific macro for every stage. It also renames __BOOT_BLOCK__ and
__VER_STAGE__ to __BOOTBLOCK__ and __VERSTAGE__ for consistency.

This change is intended to provided finer control and clearer
communication of intent after we added a new (optional) stage that falls
under __PRE_RAM__, and will hopefully provide some robustness for the
future (we don't want to end up always checking for romstage with #if
defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__) &&
!defined(__VER_STAGE__) && !defined(__YET_ANOTHER_PRERAM_STAGE__)). The
__PRE_RAM__ macro stays as it is since many features do in fact need to
differentiate on whether RAM is available. (Some also depend on whether
RAM is available at the end of a stage, in which case #if
!defined(__PRE_RAM__) || defined(__ROMSTAGE__) should now be
authoritative.)

It's unfeasable to change all existing occurences of __PRE_RAM__ that
would be better described with __ROMSTAGE__, so this patch only
demonstratively changes a few obvious ones in core code.

BUG=None
TEST=None (tested together with dependent patch).

Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219172
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Makefile.inc

@@ -99,13 +99,14 @@ postprocessors += $$(foreach d,$$(sort $$(dir $$(filter %.o %.a,$$(ramstage-objs
 	$$(eval $$(d)ramstage.o: $$(call files-in-dir,$$(d),$$(ramstage-objs)); $$$$(call link,ramstage,$$$$(filter %.o %.a,$$$$(^)),-o $$$$(@),-r)) \
 	$$(eval ramstage-objs:=$$(d)ramstage.o $$(filter-out $$(call files-in-dir,$$(d),$$(filter %.o %.a,$$(ramstage-objs))),$$(ramstage-objs))))
 
-bootblock-generic-ccopts += -D__PRE_RAM__ -D__BOOT_BLOCK__
-romstage-generic-ccopts += -D__PRE_RAM__
+bootblock-generic-ccopts += -D__PRE_RAM__ -D__BOOTBLOCK__
+romstage-generic-ccopts += -D__PRE_RAM__ -D__ROMSTAGE__
+ramstage-generic-ccopts += -D__RAMSTAGE__
 ifeq ($(CONFIG_TRACE),y)
-ramstage-c-ccopts:= -finstrument-functions
+ramstage-c-ccopts += -finstrument-functions
 endif
 ifeq ($(CONFIG_COVERAGE),y)
-ramstage-c-ccopts+=-fprofile-arcs -ftest-coverage
+ramstage-c-ccopts += -fprofile-arcs -ftest-coverage
 endif
 
 ifeq ($(CONFIG_USE_BLOBS),y)

src/arch/arm64/early_console.c

@@ -38,7 +38,7 @@ void console_tx_byte(unsigned char byte)
 #if CONFIG_USBDEBUG
 	usbdebug_tx_byte(0, byte);
 #endif
-#if CONFIG_CONSOLE_CBMEM && !defined(__BOOT_BLOCK__)
+#if CONFIG_CONSOLE_CBMEM && !defined(__BOOTBLOCK__)
 	cbmemc_tx_byte(byte);
 #endif
 }

src/console/console.c

@@ -101,8 +101,8 @@ int console_tst_byte(void)
 
 void console_init(void)
 {
-#if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \
-    !defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE
+#if defined(__BOOTBLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \
+    !defined(__BOOTBLOCK__) && CONFIG_EARLY_CONSOLE
 
 #if CONFIG_USBDEBUG
 	enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
@@ -124,9 +124,9 @@ void console_init(void)
 		"\n\ncoreboot-"
 		COREBOOT_VERSION
 		COREBOOT_EXTRA_VERSION
-#if defined(__BOOT_BLOCK__)
+#if defined(__BOOTBLOCK__)
 		" bootblock "
-#elif defined(__VER_STAGE__)
+#elif defined(__VERSTAGE__)
 		" verstage "
 #else
 		" romstage "

src/include/cbfs.h

@@ -85,7 +85,7 @@ void selfboot(void *entry);
 /* Defined in individual arch / board implementation. */
 int init_default_cbfs_media(struct cbfs_media *media);
 
-#if CONFIG_RELOCATABLE_RAMSTAGE && defined(__PRE_RAM__)
+#if CONFIG_RELOCATABLE_RAMSTAGE && defined(__ROMSTAGE__)
 /* The cache_loaded_ramstage() and load_cached_ramstage() functions are defined
  * to be weak so that board and chipset code may override them. Their job is to
  * cache and load the ramstage for quick S3 resume. By default a copy of the

src/include/console/console.h

@@ -84,8 +84,8 @@ void __attribute__ ((noreturn)) die(const char *msg);
 int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 int vprintk(int msg_level, const char *fmt, va_list args);
 
-#if defined(__BOOT_BLOCK__) && !CONFIG_BOOTBLOCK_CONSOLE || \
-    (defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)) && !CONFIG_EARLY_CONSOLE
+#if defined(__BOOTBLOCK__) && !CONFIG_BOOTBLOCK_CONSOLE || \
+    (defined(__PRE_RAM__) && !defined(__BOOTBLOCK__)) && !CONFIG_EARLY_CONSOLE
 
 static inline void printk(int LEVEL, const char *fmt, ...);
 static inline void printk(int LEVEL, const char *fmt, ...) {

src/include/romstage_handoff.h

@@ -40,7 +40,7 @@ struct romstage_handoff {
 	uint32_t ramstage_entry_point;
 };
 
-#if defined(__PRE_RAM__)
+#if defined(__ROMSTAGE__)
 /* The romstage_handoff_find_or_add() function provides the necessary logic
  * for initializng the romstage_handoff structure in cbmem. Different components
  * of the romstage may be responsible for setting up different fields. Therefore

src/lib/cbfs.c

@@ -27,7 +27,7 @@
 # define CBFS_MINI_BUILD
 #elif defined(__SMM__)
 # define CBFS_MINI_BUILD
-#elif defined(__BOOT_BLOCK__) || defined(__VER_STAGE__)
+#elif defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
   /* No LZMA in boot block. */
 #else
 # define CBFS_CORE_WITH_LZMA
@@ -117,7 +117,7 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor,
 	return dest;
 }
 
-#if CONFIG_RELOCATABLE_RAMSTAGE && defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)
+#if CONFIG_RELOCATABLE_RAMSTAGE && defined(__ROMSTAGE__)
 
 #include <rmodule.h>
 #include <romstage_handoff.h>
@@ -346,7 +346,7 @@ int cbfs_payload_headers(struct cbfs_media *media,
 	return cur;
 }
 
-#if !CONFIG_ALT_CBFS_LOAD_PAYLOAD && !defined(__BOOT_BLOCK__)
+#if !CONFIG_ALT_CBFS_LOAD_PAYLOAD
 void *cbfs_load_payload(struct cbfs_media *media, const char *name)
 {
 	struct cbfs_payload *payload;

src/lib/cbmem_console.c

@@ -111,7 +111,7 @@ static inline void init_console_ptr(void *storage, u32 total_space)
 	car_set_var(cbmem_console_p, cbm_cons_p);
 	cbm_cons_p->buffer_size = total_space - sizeof(struct cbmem_console);
 #if !CONFIG_CONSOLE_FIXED_PRERAM_CBMEM_BUFFER || \
-    ((defined __BOOT_BLOCK__ && CONFIG_BOOTBLOCK_CONSOLE) || \
+    ((defined __BOOTBLOCK__ && CONFIG_BOOTBLOCK_CONSOLE) || \
      (defined __PRE_RAM__ && !defined __BOOTBLOCK__ && \
       CONFIG_EARLY_CONSOLE && !CONFIG_BOOTBLOCK_CONSOLE))
 	cbm_cons_p->buffer_cursor = 0;

src/soc/rockchip/rk3288/media.c

@@ -24,7 +24,7 @@
 
 int init_default_cbfs_media(struct cbfs_media *media)
 {
-#if defined(__BOOT_BLOCK__) || defined(__VER_STAGE__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
 	return initialize_rockchip_spi_cbfs_media(media,
 		(void *)CONFIG_CBFS_SRAM_CACHE_ADDRESS,
 		CONFIG_CBFS_SRAM_CACHE_SIZE);

src/soc/samsung/exynos5250/alternate_cbfs.h

@@ -36,7 +36,7 @@ static u32 * const iram_secondary_base = (u32 *)0x02020018;
 #define OM_STAT_SPI  0x14
 #define OM_STAT_MASK 0x7f
 
-#if defined(__BOOT_BLOCK__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
 	/* A small space in IRAM to hold the romstage-only image */
 	static void * const alternate_cbfs_buffer =
 			(void *)CONFIG_CBFS_CACHE_ADDRESS;

src/soc/samsung/exynos5250/gpio.c

@@ -211,12 +211,6 @@ int gpio_set_value(unsigned gpio, int value)
  */
 #define GPIO_DELAY_US 5
 
-#ifndef __BOOT_BLOCK__
-/*
- * FIXME(dhendrix): These functions use udelay, which has dependencies on
- * pwm code and timer code. These aren't necessary for the bootblock and
- * bloat the image significantly.
- */
 int gpio_read_mvl3(unsigned gpio)
 {
 	int high, low;
@@ -252,7 +246,6 @@ int gpio_read_mvl3(unsigned gpio)
 
 	return value;
 }
-#endif	/* __BOOT_BLOCK__ */
 
 /*
  * Display Exynos GPIO information

src/soc/samsung/exynos5420/alternate_cbfs.h

@@ -36,7 +36,7 @@ static u32 * const iram_secondary_base = (u32 *)0x02020018;
 #define OM_STAT_SPI  0x14
 #define OM_STAT_MASK 0x7f
 
-#if defined(__BOOT_BLOCK__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
 	/* A small space in IRAM to hold the romstage-only image */
 	static void * const alternate_cbfs_buffer =
 			(void *)CONFIG_CBFS_CACHE_ADDRESS;

src/soc/samsung/exynos5420/gpio.c

@@ -211,12 +211,6 @@ int gpio_set_value(unsigned gpio, int value)
  */
 #define GPIO_DELAY_US	15
 
-#ifndef __BOOT_BLOCK__
-/*
- * FIXME(dhendrix): These functions use udelay, which has dependencies on
- * pwm code and timer code. These aren't necessary for the bootblock and
- * bloat the image significantly.
- */
 int gpio_read_mvl3(unsigned gpio)
 {
 	int high, low;
@@ -252,7 +246,6 @@ int gpio_read_mvl3(unsigned gpio)
 
 	return value;
 }
-#endif	/* __BOOT_BLOCK__ */
 
 /*
  * Display Exynos GPIO information

src/vendorcode/google/chromeos/Makefile.inc

@@ -111,7 +111,7 @@ VB_SOURCE := vboot_reference
 INCLUDES += -I$(VB_SOURCE)/firmware/2lib/include
 INCLUDES += -I$(VB_SOURCE)/firmware/include
 
-verstage-generic-ccopts += -D__PRE_RAM__ -D__VER_STAGE__
+verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
 
 ifeq ($(CONFIG_RETURN_FROM_VERSTAGE),y)
 bootblock-y += verstub.c chromeos.c

src/vendorcode/google/chromeos/chromeos.c

@@ -107,7 +107,7 @@ int vboot_skip_display_init(void)
 #endif
 }
 
-#ifdef __PRE_RAM__
+#ifdef __ROMSTAGE__
 void __attribute__((weak)) save_chromeos_gpios(void)
 {
 	// Can be implemented by a mainboard

src/vendorcode/google/chromeos/chromeos.h

@@ -32,7 +32,7 @@ int get_write_protect_state(void);
 /*for mainboard use only*/
 void setup_chromeos_gpios(void);
 
-#ifdef __PRE_RAM__
+#ifdef __ROMSTAGE__
 void __attribute__((weak)) save_chromeos_gpios(void);
 #endif