UPSTREAM: AGESA: Move heap allocator declarations

Definitions are not part of ACPI S3 feature, nor do
they require any AGESA headers so move them to a
better location.

BUG=none
BRANCH=none
TEST=none

Change-Id: Icb4e2a24f724cf12b9891e9a73a5683972155994
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: da74041b2b
Original-Change-Id: I9269e9d65463463d9b8280936cf90ef76711ed4f
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18616
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-on: https://chromium-review.googlesource.com/451430
This commit is contained in:
Kyösti Mälkki 2017-03-05 18:57:03 +02:00 committed by chrome-bot
commit a41716dc7f
6 changed files with 23 additions and 18 deletions

View file

@ -17,7 +17,7 @@
#include "heapManager.h"
#include <cbmem.h>
#include <cpu/amd/agesa/s3_resume.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <arch/acpi.h>

View file

@ -25,6 +25,7 @@
#include <string.h>
#include <halt.h>
#include "s3_resume.h"
#include <northbridge/amd/agesa/agesa_helper.h>
static void move_stack_high_mem(void)
{

View file

@ -22,20 +22,4 @@ void prepare_for_resume(void);
void backup_mtrr(void *mtrr_store, u32 *mtrr_store_size);
const void *OemS3Saved_MTRR_Storage(void);
void *GetHeapBase(void);
void EmptyHeap(void);
void ResumeHeap(void **heap, size_t *len);
#define BSP_STACK_BASE_ADDR 0x30000
#if 1
/* This covers node 0 only. */
#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
#else
/* This covers total of 8 nodes. */
#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR)
#endif
#define HIGH_MEMORY_SCRATCH 0x30000
#endif

View file

@ -16,6 +16,8 @@
#ifndef _AGESA_HELPER_H_
#define _AGESA_HELPER_H_
#include <stddef.h>
enum {
PICK_DMI, /* DMI Interface */
PICK_PSTATE, /* Acpi Pstate SSDT Table */
@ -33,4 +35,21 @@ void amd_initcpuio(void);
void amd_initmmio(void);
void amd_initenv(void);
void *GetHeapBase(void);
void EmptyHeap(void);
void ResumeHeap(void **heap, size_t *len);
#define BSP_STACK_BASE_ADDR 0x30000
#if 1
/* This covers node 0 only. */
#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
#else
/* This covers total of 8 nodes. */
#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR)
#endif
#define HIGH_MEMORY_SCRATCH 0x30000
#endif /* _AGESA_HELPER_H_ */

View file

@ -21,6 +21,7 @@
#include <cpu/amd/agesa/s3_resume.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <AGESA.h>
#include <northbridge/amd/agesa/agesa_helper.h>
typedef enum {
S3DataTypeNonVolatile = 0, ///< NonVolatile Data Type

View file

@ -16,6 +16,7 @@
#include <stdint.h>
#include <string.h>
#include <cpu/x86/mtrr.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include "cpuRegisters.h"
@ -30,7 +31,6 @@
#include "heapManager.h"
#include "FchPlatform.h"
#include "Fch.h"
#include <cpu/amd/agesa/s3_resume.h>
#include <arch/io.h>
#include <device/device.h>
#include "hudson.h"