From a4156f99ffb886bbb9e5f8395182104e201fb072 Mon Sep 17 00:00:00 2001 From: Appukuttan V K Date: Tue, 1 Jul 2025 22:54:03 +0530 Subject: [PATCH] soc/intel/ptl: Add Wildcat Lake CPU ID to platform reporting MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit updates the platform reporting logic to recognize the Wildcat Lake SoC CPU ID. Key changes: - Add CPUID_WILDCATLAKE_A0 to the list of recognized CPU IDs in the platform reporting module. References: - Wildcat Lake Processor EDS Volume 1 (#842271) - Wildcat Lake External Design Specification (EDS) Volume 2 (#829345) BUG=b:394208231 TEST=Build Ocelot and verify it compiles without any error. Change-Id: I8c9e81446a12ee0a6e18f1ba3f36166652a05f5e Signed-off-by: Appukuttan V K Reviewed-on: https://review.coreboot.org/c/coreboot/+/88271 Reviewed-by: Nick Vaccaro Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N Reviewed-by: Jérémy Compostella --- src/soc/intel/pantherlake/bootblock/report_platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/pantherlake/bootblock/report_platform.c b/src/soc/intel/pantherlake/bootblock/report_platform.c index 516264de02..d6cae4afad 100644 --- a/src/soc/intel/pantherlake/bootblock/report_platform.c +++ b/src/soc/intel/pantherlake/bootblock/report_platform.c @@ -23,6 +23,7 @@ static struct { { CPUID_PANTHERLAKE_A0, "Pantherlake A0" }, { CPUID_PANTHERLAKE_B0_1, "Pantherlake B0" }, { CPUID_PANTHERLAKE_B0_2, "Pantherlake B0" }, + { CPUID_WILDCATLAKE_A0, "Wildcatlake A0" }, }; static struct {