From a2b6e205098d1f188f729f5eab3ce6a3e8f23e4b Mon Sep 17 00:00:00 2001 From: Niklaus Liu Date: Sat, 16 Aug 2025 15:04:16 +0800 Subject: [PATCH] soc/mediatek/common: Increase per-channel SPMI max byte count to 2 In the scenario of suspend, when the SPM firmware attempts to turn off the VDDQ and VMDDR power supplies, the command sent is rejected by PMIF, resulting in a system hang. The reason is that SPM simultaneously wrote two registers (two bytes), while the original configuration only allowed reading or writing one byte at a time. Modify the maximum number of bytes that an SPMI user can read or write in a single operation to meet the requirement of reading or writing 16 bits at once. BUG=b:420874944 BRANCH=skywalker TEST=2-byte R/W passed; suspend-resume verified successfully. Change-Id: I46ace45564328c46ab340b74d73e3574957e36ef Signed-off-by: Niklaus Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/88790 Reviewed-by: Vince Liu Tested-by: build bot (Jenkins) Reviewed-by: Niklaus Liu Reviewed-by: Yu-Ping Wu Reviewed-by: Yidi Lin --- src/soc/mediatek/common/pmif_spmi.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/soc/mediatek/common/pmif_spmi.c b/src/soc/mediatek/common/pmif_spmi.c index d6318eaa8c..6bc3e31524 100644 --- a/src/soc/mediatek/common/pmif_spmi.c +++ b/src/soc/mediatek/common/pmif_spmi.c @@ -104,14 +104,16 @@ static void pmif_spmi_enable(struct pmif *arb) pmif_spmi_config(arb); /* - * set bytecnt max limitation. - * hw bytecnt indicate when we set 0, it can send 1 byte; - * set 1, it can send 2 byte. + * Set max bytecnt. For each 32-bit reg, 4 bits indicate one channel. + * 0x0 means max bytecnt = 1. + * 0x1 means max bytecnt = 2. + * Here we set max bytecnt to 2 for all channels. */ - write32(&arb->mtk_pmif->inf_max_bytecnt_per_0, 0); - write32(&arb->mtk_pmif->inf_max_bytecnt_per_1, 0); - write32(&arb->mtk_pmif->inf_max_bytecnt_per_2, 0); - write32(&arb->mtk_pmif->inf_max_bytecnt_per_3, 0); + + write32(&arb->mtk_pmif->inf_max_bytecnt_per_0, 0x11111111); + write32(&arb->mtk_pmif->inf_max_bytecnt_per_1, 0x11111111); + write32(&arb->mtk_pmif->inf_max_bytecnt_per_2, 0x11111111); + write32(&arb->mtk_pmif->inf_max_bytecnt_per_3, 0x11111111); /* Add latency limitation */ write32(&arb->mtk_pmif->lat_cnter_en, PMIF_SPMI_INF);