From a25dff24a2dcd33fcd15eb766432414af215c3ab Mon Sep 17 00:00:00 2001 From: Jimmy Zhang Date: Thu, 4 Dec 2014 17:24:43 -0800 Subject: [PATCH] rush: Add gpio config for PWR button and LID open switch Due to CL https://chromium-review.googlesource.com/231250, depthcharge now detects gpio state based on gpio configurations done by coreboot instead of redoing configuration at depthcharge. However, PWR button and LID open pins have not been configured in coreboot. So, add the missing code here. Otherwise, TOT coreboot/depthcharge rush build can not load in kernel. BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush and test with pwr button press and lid switch Change-Id: I6c322cd987967920f236aae653294db079678408 Signed-off-by: Jimmy Zhang Reviewed-on: https://chromium-review.googlesource.com/233322 Reviewed-by: Aaron Durbin --- src/mainboard/google/rush/bootblock.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mainboard/google/rush/bootblock.c b/src/mainboard/google/rush/bootblock.c index 93c04f93ac..2d099fb6c3 100644 --- a/src/mainboard/google/rush/bootblock.c +++ b/src/mainboard/google/rush/bootblock.c @@ -50,6 +50,12 @@ static const struct pad_config padcfgs[] = { PAD_CFG_GPIO_INPUT(GPIO_X1_AUD, PINMUX_PULL_NONE), PAD_CFG_GPIO_INPUT(KB_ROW17, PINMUX_PULL_NONE), PAD_CFG_GPIO_INPUT(KB_COL3, PINMUX_PULL_NONE), + + /* Power Button */ + PAD_CFG_GPIO_INPUT(KB_COL0, PINMUX_PULL_NONE), + + /* Lid Open Switch */ + PAD_CFG_GPIO_INPUT(KB_ROW4, PINMUX_PULL_UP), }; static const struct pad_config i2cpad[] = {