erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

mb/starlabs/starbook/*: Tidy GPIO comments for debug connector

Browse source 
This is a non-functional change, and only makes the GPIOs easier to read.

Change-Id: I5e271508fcd99c01f7de4e5dad7a1941ba1968ec
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-04-02 10:43:35 +01:00
commit a22bfba5cf
9 changed files with 29 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

7
src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c
View file

@ -4,10 +4,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H10: UART0 RXD Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11: UART0 TXD Debug Connector */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)

7
src/mainboard/starlabs/starbook/variants/adl/gpio.c
View file

@ -4,10 +4,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H10: UART0 RXD Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11: UART0 TXD Debug Connector */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)

8
src/mainboard/starlabs/starbook/variants/cml/gpio.c
View file

@ -9,10 +9,10 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* C20: UART2_RXD */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* C21: UART2_TXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* Debug Connector */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* RXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* TXD */
/* E22: BRD_ID0 */
PAD_CFG_GPO(GPP_E22, 1, PLTRST),
/* E23: BRD_ID1 */

7
src/mainboard/starlabs/starbook/variants/kbl/gpio.c
View file

@ -9,10 +9,9 @@
/* Early pad configuration in bootblock. */
const struct pad_config early_gpio_table[] = {
/* C20: UART2_RXD */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* C21: UART2_TXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* Debug Connector */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* RXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)

7
src/mainboard/starlabs/starbook/variants/mtl/gpio.c
View file

@ -4,10 +4,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H08: UART0 RXD */
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
/* H09: UART0 TXD */
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1),
/* Debug Connector */
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), /* RXD */
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), /* TXD */
/* C00: SMB_CLK */
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1),

7
src/mainboard/starlabs/starbook/variants/rpl/gpio.c
View file

@ -4,10 +4,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H10: UART0 RXD Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11: UART0 TXD Debug Connector */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)

7
src/mainboard/starlabs/starbook/variants/tgl/gpio.c
View file

@ -9,10 +9,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* C20: UART2_RXD_R */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* C21: UART2_TXD_R */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* Debug Connector */
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* RXD */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)

8
src/mainboard/starlabs/starfighter/variants/rpl/gpio.c
View file

@ -4,10 +4,10 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H10: UART0 RXD Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11: UART0 TXD Debug Connector */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
/* F12: Board ID 0 */
PAD_CFG_GPI_LOCK(GPP_F12, NONE, LOCK_CONFIG),
/* F13: Board ID 1 */

7
src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
View file

@ -4,10 +4,9 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* H10: UART0 RXD Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11: UART0 TXD Debug Connector */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)