From a1b7f5e1b8b1b5ad0f9739d8d59e118d5a773cb1 Mon Sep 17 00:00:00 2001 From: Kilian Krause Date: Wed, 30 Jul 2025 13:16:18 +0200 Subject: [PATCH] mb/siemens/mc_rpl: Disable EIST to improve deterministic behavior Disable Enhanced Intel SpeedStep Technology (EIST) to prevent OS-controlled P-state transitions. This improves consistent CPU frequency bevahior across all cores, which is critical for real-time applictaions requiring deterministic performance. The existing devicetree parameter 'eist_enable' only configures the IA32_MISC_ENABLE register but does not affect the FSP-S parameter 'Eist'. This results in FSP re-enabling EIST during silicon initialization, overriding the register setting. Override the FSP-S 'Eist' parameter at mainboard level rather than fixing it in SoC code, since devicetree parameters default to 0 when unset and would disable EIST on boards that rely on FSP defaults. Change-Id: Ic83246d88607a8ed0c9815e306934bcf0bf8f016 Signed-off-by: Kilian Krause Reviewed-on: https://review.coreboot.org/c/coreboot/+/88965 Reviewed-by: Werner Zeh Tested-by: build bot (Jenkins) --- src/mainboard/siemens/mc_rpl/devicetree.cb | 2 ++ src/mainboard/siemens/mc_rpl/mainboard.c | 1 + 2 files changed, 3 insertions(+) diff --git a/src/mainboard/siemens/mc_rpl/devicetree.cb b/src/mainboard/siemens/mc_rpl/devicetree.cb index 35a09f3a5e..5477b4697a 100644 --- a/src/mainboard/siemens/mc_rpl/devicetree.cb +++ b/src/mainboard/siemens/mc_rpl/devicetree.cb @@ -13,6 +13,8 @@ chip soc/intel/alderlake # Sagv Configuration register "sagv" = "SaGv_Disabled" + register "eist_enable" = "false" + register "dptf_enable" = "false" register "s0ix_enable" = "false" diff --git a/src/mainboard/siemens/mc_rpl/mainboard.c b/src/mainboard/siemens/mc_rpl/mainboard.c index 28068395c0..a96ab859cd 100644 --- a/src/mainboard/siemens/mc_rpl/mainboard.c +++ b/src/mainboard/siemens/mc_rpl/mainboard.c @@ -93,6 +93,7 @@ enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_L void mainboard_silicon_init_params(FSP_S_CONFIG *params) { + params->Eist = 0; params->TurboMode = 0; }