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drivers/spi: Allow SoC to provide the SPI flash CS index

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On AMD platforms the PSP can boot from different SPI CS lines
and do a recovery boot in case the default CS0 isn't usable.

Allow the SoC to provide the current boot_device CS line by
adding a new weak function.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ic9ed54b7979405d433f22458265f09701cda842e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Patrick Rudolph 2025-09-30 15:11:01 +02:00 • committed by Matt DeVillier
commit a12663fd88
3 changed files with 15 additions and 2 deletions
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3
src/include/boot_device.h
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@ -27,6 +27,9 @@ enum bootdev_prot_type {
* most likely not to work so don't rely on such semantics.
*/
/* Return the chip select index used for probing the SPI flash. */
int boot_device_spi_cs(void);
/* Return the region_device for the read-only boot device. This is the root
device for all CBFS boot devices. */
const struct region_device *boot_device_ro(void);