From a1210875e9fe76e5ba6be029bd7bd08a8349e343 Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Thu, 9 Jan 2025 16:43:27 +0300 Subject: [PATCH] mb/imb-1222: Update some GPIOs according to new vendor config The memory dump was done for the 1.80 (2023-04-07) version of the vendor's UEFI. Change-Id: I649e2c3ae715651b5f0eadc9b52e61e4deae77a1 Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/85928 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/asrock/imb-1222/gpio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/asrock/imb-1222/gpio.c b/src/mainboard/asrock/imb-1222/gpio.c index 549b716fee..19f14f8655 100644 --- a/src/mainboard/asrock/imb-1222/gpio.c +++ b/src/mainboard/asrock/imb-1222/gpio.c @@ -147,15 +147,15 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO(GPP_K3, 0, PLTRST), PAD_CFG_GPO(GPP_K4, 1, PLTRST), PAD_CFG_GPO(GPP_K5, 1, PLTRST), - PAD_NC(GPP_K6, NONE), - PAD_NC(GPP_K7, NONE), + PAD_CFG_GPO(GPP_K6, 0, RSMRST), + PAD_CFG_GPO(GPP_K7, 0, RSMRST), PAD_CFG_GPO(GPP_K8, 0, PLTRST), PAD_CFG_GPO(GPP_K9, 0, PLTRST), PAD_CFG_GPO(GPP_K10, 0, PLTRST), PAD_CFG_GPO(GPP_K11, 0, PLTRST), PAD_CFG_GPI_SCI(GPP_K12, NONE, PLTRST, EDGE_SINGLE, INVERT), PAD_NC(GPP_K13, NONE), - PAD_CFG_GPO(GPP_K14, 0, DEEP), + PAD_CFG_GPO(GPP_K14, 1, DEEP), PAD_CFG_GPI_TRIG_OWN(GPP_K15, NONE, PLTRST, OFF, ACPI), PAD_CFG_GPO(GPP_K16, 0, PLTRST), PAD_CFG_GPI_TRIG_OWN(GPP_K17, NONE, PLTRST, OFF, ACPI), @@ -247,7 +247,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_I9, NONE, PLTRST, NF1), /* DDPD_CTRLCLK */ PAD_CFG_NF(GPP_I10, NONE, PLTRST, NF1), /* DDPD_CTRLDATA */ PAD_NC(GPP_I11, NONE), - PAD_CFG_GPO(GPP_I12, 1, PLTRST), + PAD_CFG_GPO(GPP_I12, 0, PLTRST), PAD_NC(GPP_I13, NONE), PAD_CFG_GPO(GPP_I14, 1, PLTRST),