Docs/releases: Update 25.06 release notes
These are the release notes planned to go out with the 25.06 release. Note that we've removed the bugs section. We may look at adding "Fixed Bugs" and "New Bugs" in the future, but it was depressing not seeing changes between the releases. Change-Id: I8cedbdb7b05605d1904446590fb25552a7e0c727 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88206 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Martin L Roth
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Upcoming release - coreboot 25.06
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========================================================================
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The 25.06 release is scheduled for the end of June, 2025
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The coreboot project is pleased to announce the release of coreboot
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25.06, another milestone in our work promoting the use of open-source
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firmware. This release incorporates almost 900 commits from more than
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120 contributors, bringing enhanced boot splash screen capabilities,
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improved build tooling with GCC 15 support, and expanded wireless power
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management features. Along with these headline improvements, we've
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delivered numerous stability enhancements and infrastructure updates
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that strengthen coreboot's foundation across all supported platforms.
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As always, the coreboot project extends our appreciation to everyone who
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contributed to this release. From seasoned developers submitting complex
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patches to newcomers providing valuable feedback and testing, your
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collective efforts make each coreboot release better than the last. The
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continued growth of our contributor base demonstrates the strength and
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vitality of the open firmware community.
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Update this document with changes that should be in the release notes.
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* Please use Markdown.
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* See the past few release notes for the general format.
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* The chip and board additions and removals will be updated right
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before the release, so those do not need to be added.
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* Note that all changes before the release are done are marked upcoming.
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A final version of the notes are done after the release.
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The next coreboot release, 25.09, is scheduled for the end of September
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2025.
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Significant or interesting changes
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----------------------------------
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* Add changes that need a full description here
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### {lib, drivers/intel}: Enhanced boot splash screen framework
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* This section should have full descriptions and can or should have
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a link to the referenced commits.
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A comprehensive overhaul of the boot splash screen infrastructure
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introduces support for multiple logo types and improved rendering
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capabilities. The new framework adds `bmp_load_logo_by_type()` function
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(be5609bdaf, 4373eea5d8) to enable platform-specific logo selection,
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while introducing splash screen footer support for better brand
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presentation.
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The enhanced system includes horizontal logo alignment controls
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(dfeaead9f2) and configurable footer bottom margins (97f92d5c69),
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providing OEMs with greater flexibility in customizing the boot
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experience. Additionally, the framework now tracks splash screen
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rendering completion (4c446751c6) through commonlib, enabling better
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coordination between firmware phases and payload handoff.
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Low-battery mode detection has been integrated into the splash screen
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system, automatically suppressing OEM footers when battery levels are
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critical (d309a9dfa8). This ensures essential power information takes
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precedence during low-power boot scenarios, improving user experience on
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battery-powered devices.
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### util/cbfstool: Multi-ELF support for advanced payload configurations
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The cbfstool utility has been extended with multi-ELF support
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(0dcea61e7c), enabling more sophisticated payload packaging and
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deployment scenarios. This enhancement allows firmware developers to
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bundle multiple ELF binaries within a single CBFS entry, facilitating
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complex boot scenarios where multiple components need to be loaded
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simultaneously.
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The implementation provides better flexibility for hypervisor
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deployments, multi-stage bootloaders, and security-enhanced boot
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configurations where isolation between components is critical. This
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feature particularly benefits platforms requiring trusted execution
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environments or compartmentalized boot processes.
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### drivers/wifi/generic: Advanced Power Reduction Features
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Implementation of both Wi-Fi and Bluetooth Power Reduction Request (PRR)
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DSM functions (d92b6163e7, efa24540b0) significantly improves power
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management capabilities for wireless subsystems. These ACPI methods
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enable operating systems to request aggressive power savings during
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idle periods or when specific wireless functions are not required.
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The PRR implementation follows Microsoft's Modern Standby
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specifications, allowing Windows and other operating systems to achieve
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deeper sleep states by coordinating with wireless hardware. This results
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in improved battery life on mobile platforms and better thermal
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management on passively cooled systems.
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### security/vboot: Enhanced boot phase integrity management
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The vboot subsystem now includes CMOS data backup during later boot
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phases (bf330f2dd0), providing additional protection against unexpected
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power events during firmware execution. This change ensures that
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critical configuration data remains consistent even if power is lost
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during complex initialization sequences.
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A new VBOOT_EC_SYNC_ESOL Kconfig option (ac4503d0dd) has been introduced
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to provide finer control over Embedded Controller synchronization
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behavior. This allows platforms to optimize EC update procedures based
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on their specific hardware requirements and boot time constraints.
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Additionally, MRC cache measurements as runtime data (b5581d556b) have
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been integrated into the trusted boot chain, ensuring that memory
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training data integrity is verified as part of the overall system
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attestation process.
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### Build system improvements: GCC 15 compatibility and toolchain updates
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Comprehensive work has been completed to ensure compatibility with GCC
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15, including fixes for the new -Werror=unterminated-string-initialization
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warning (73cc8a413a). The build system now properly handles modern
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compiler requirements while maintaining backward compatibility with
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existing toolchain versions.
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The crossgcc build system has been enhanced with RISC-V ISA
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specification support (89e4fff2d3), enabling more precise control over
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RISC-V target architectures. This improvement allows developers to build
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optimized firmware for specific RISC-V implementations while ensuring
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compatibility across the diverse RISC-V ecosystem.
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Submodule management has been significantly improved with better path
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handling (c4eb645a0b) and enhanced logging (f2310ab35e), making it
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easier for developers to track third-party component updates and
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maintain consistent build environments.
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### Enhanced SoC support: Emerald Rapids and Panther Lake
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Support for Intel's 5th Generation Xeon Scalable Processors (Emerald
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Rapids) has been added (9d878fc6c0), bringing coreboot to Intel's latest
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server and workstation platforms. This implementation includes support
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for the expanded feature set and improved power management capabilities
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of the Emerald Rapids architecture.
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Panther Lake support continues to evolve with new SKU additions
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(b879342fe6) and VR Fast Vmode threshold optimizations (e58883aace).
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The refactored SoC configuration (cf5696834b) provides a cleaner
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foundation for supporting the full range of Panther Lake variants as
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they become available.
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### Documentation: Clarification of contributor responsibilities and AI tool usage
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A significant policy clarification has been added to the project
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documentation (9ddc9cbfc9) addressing contributor responsibilities,
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particularly in the context of modern development practices including
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the use of AI-assisted tools. This addition reinforces that submitters
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bear full responsibility for ensuring their contributions meet coreboot's
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quality standards and comply with all applicable licensing requirements,
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regardless of how the code was generated or authored.
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The new documentation explicitly states that contributors must have all
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necessary rights to submit their work under coreboot's licenses, and
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that violations of third-party rights will result in code removal or
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replacement. This policy applies universally, encompassing contributions
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created through various means including generative AI tooling, ensuring
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the project maintains clear legal standing and quality expectations.
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This clarification provides important guidance to the growing coreboot
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community as development practices evolve, establishing clear
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expectations while allowing contributors the flexibility to use whatever
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tools help them create high-quality firmware code.
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Additional coreboot changes
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---------------------------
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The following are changes across a number of patches, or changes worth
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noting, but not needing a full description.
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* Changes that only need a line or two of description go here.
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* Exposed ALWAYS_ALLOW_ABOVE_4G_ALLOCATION in Kconfig for x86 to fix
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Resizable BAR support on modern GPUs.
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* Enhanced PCI support with SR-IOV Virtual Function BAR resource
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assignment capabilities
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* Improved SPI driver support for forced 4-byte address mode operation
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via 0xB7 command sequences
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* Numerous MediaTek MT8189 and MT8196 platform enhancements including
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eDP, DDP, and AUXADC driver improvements
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* Enhanced memory initialization support across multiple Intel platforms
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with improved timing and reliability
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* Expanded superio support with addition of Fintek f81966d controller
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* Improved ELOG handling for later boot phase operations
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* Enhanced SMMSTORE driver with 64-bit MMIO address support
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* Comprehensive timing infrastructure improvements with early chip
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initialization timestamps
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* Libpayload updates focused on ARM64 DMA and MMU fixes, build system
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improvements, and support for large USB mass storage devices.
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* Add documentation on devicetree, sconfig, cbmem and device operations.
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* Contributor guides updated with new commit message policy, Gerrit
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instructions, and collaboration details.
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@ -39,50 +185,80 @@ Changes to external resources
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-----------------------------
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### Toolchain updates
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* Fix GMP build on GCC 15
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* Add a `RISCV_ISA_SPEC` variable to the toolchain build script to allow
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for specifying the RISC-V ISA version.
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### Git submodule pointers
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* arm-trusted-firmware: Update from commit id e5a1f4abee to 9109143417
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(523 commits)
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* fsp: Update from commit id 86c9111639 to cc36ae2b57 (9 commits)
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* intel-microcode: Update from commit id 8a62de41c0 to eeb93b7a81 (1
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commit)
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### External payloads
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* edk2: Update default branch for MrChromebox repo to 2025-02
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Platform Updates
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----------------
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### Added mainboards:
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* To be filled in immediately before the release by the release team
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### Removed Mainboards
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* To be filled in immediately before the release by the release team
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* ASUS H61M-A/USB3
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* CWWK CW-ADL-4L-V1.0
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* CWWK CW-ADLNTB-1C2L-V3.0
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* Google Anakin
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* Google Baze
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* Google Bluey
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* Google Brox RTK EC
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* Google Epic
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* Google Fatcat4ES
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* Google Fatcatite4ES
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* Google Fatcatnuvo4ES
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* Google Felino4ES
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* Google Kaladin
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* Google Kinmen
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* Google Obiwan
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* Google Ocelot4ES
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* Google Ocelotite
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* Google Ocelotite4ES
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* Google Ocelotmchp
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* Google Ocelotmchp4ES
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* Google Pujjocento
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* Google Pujjolo
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* Google Quenbi
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* Google Yoda
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* Intel Google Chrome EC
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* MiTAC Computing R520G6SB
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* MiTAC Computing SC513G6
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* NovaCustom V540TNx (14")
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* NovaCustom V560TNx (16")
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* Siemens MC RPL1
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* Star Labs Byte Mk III (N355)
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* System76 darp11
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* System76 lemp13
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### Updated SoCs
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* To be filled in immediately before the release by the release team
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* Added qualcomm/x1p42100
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Plans to move platform support to a branch
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------------------------------------------
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* To be filled in immediately before the release by the release team
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Statistics from the 24.12 to the 25.03 release
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Statistics from the 25.03 to the 25.06 release
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--------------------------------------------
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* To be filled in immediately before the release by the release team
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Significant Known and Open Issues
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---------------------------------
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Issues from the coreboot bugtracker: <https://ticket.coreboot.org/>
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* To be filled in immediately before the release by the release team
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* Total Commits: 879
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* Average Commits per day: 9.95
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* Total lines added: 73596
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* Average lines added per commit: 83.73
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* Number of patches adding more than 100 lines: 84
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* Average lines added per small commit: 40.40
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* Total lines removed: 15717
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* Average lines removed per commit: 17.88
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* Total difference between added and removed: 57879
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* Total authors: 128
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* New authors: 34
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coreboot Links and Contact Information
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@ -94,3 +270,4 @@ coreboot Links and Contact Information
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* Documentation: <https://doc.coreboot.org>
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* Issue tracker: <https://ticket.coreboot.org/projects/coreboot>
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* Donations: <https://coreboot.org/donate.html>
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