From 9fb306f53ce3497b66549cd587bc531b6c417529 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 3 Sep 2025 11:03:55 +0530 Subject: [PATCH] soc/qualcomm/x1p42100: Add SPMI driver to ramstage The SPMI (System Power Management Interface) driver is necessary for power management functionalities on the Qualcomm x1p42100 SoC. This commit adds spmi.c to the ramstage-y list in the Makefile.mk, ensuring that the SPMI driver is compiled and available during the ramstage of the coreboot execution. TEST=Able to build and boot google/quenbi. Change-Id: Iba0a423e4a25d7ec9c55e24a1463a4fd4c53cc4f Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/89020 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- src/soc/qualcomm/x1p42100/Makefile.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/qualcomm/x1p42100/Makefile.mk b/src/soc/qualcomm/x1p42100/Makefile.mk index 86aeb36fa4..fb82673a15 100644 --- a/src/soc/qualcomm/x1p42100/Makefile.mk +++ b/src/soc/qualcomm/x1p42100/Makefile.mk @@ -44,6 +44,7 @@ ramstage-y += cbmem.c ramstage-y += ../common/mmu.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c ramstage-$(CONFIG_PCI) += ../common/pcie_common.c +ramstage-y += ../common/spmi.c ramstage-$(CONFIG_PCI) += pcie.c ramstage-y += cpucp_load_reset.c