mb/starlabs/*: Disable c6dram

None of these boards support or use S0ix so c6dram isn't needed, so
disable it.

Change-Id: I8124899a1f7ce20442f28919f7315ee7e52355e5
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84632
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb

@@ -1,6 +1,5 @@
 chip soc/intel/alderlake
 	# FSP UPDs
-	register "enable_c6dram"		= "true"
 	register "eist_enable"			= "true"
 	register "cnvi_bt_audio_offload"	= "true"
 	register "cnvi_bt_core"			= "true"

src/mainboard/starlabs/starbook/variants/adl/devicetree.cb

@@ -1,7 +1,6 @@
 chip soc/intel/alderlake
 	# FSP UPDs
 	register "eist_enable"			= "true"
-	register "enable_c6dram"		= "1"
 	register "sagv"				= "SaGv_Enabled"
 
 	# Serial I/O

src/mainboard/starlabs/starbook/variants/cml/devicetree.cb

@@ -1,7 +1,6 @@
 chip soc/intel/cannonlake
 	# FSP UPDs
 	register "eist_enable"			= "true"
-	register "enable_c6dram"		= "1"
 	register "SaGv"				= "SaGv_Enabled"
 
 	# Graphics

src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb

@@ -3,7 +3,6 @@ chip soc/intel/alderlake
 	register "disable_dynamic_tccold_handshake"	= "true"
 	register "eist_enable"				= "true"
 	register "enable_c1e"				= "true"
-	register "enable_c6dram"			= "true"
 	register "sagv"					= "SaGv_Enabled"
 
 	# Serial I/O

src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb

@@ -1,7 +1,6 @@
 chip soc/intel/tigerlake
 	# FSP UPDs
 	register "eist_enable"			= "true"
-	register "enable_c6dram"		= "1"
 	register "CnviBtCore"			= "true"
 	register "CnviBtAudioOffload"		= "1"
 	register "SaGv"				= "SaGv_Enabled"

src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb

@@ -9,7 +9,6 @@ chip soc/intel/alderlake
 	}"
 
 	# FSP Memory
-	register "enable_c6dram"		= "1"
 	register "sagv"				= "SaGv_Enabled"
 
 	# FSP Silicon