From 9d878fc6c0a7316c8f33f1aac8507b900bc89f2c Mon Sep 17 00:00:00 2001 From: Felix Zimmer Date: Thu, 15 May 2025 16:25:49 +0200 Subject: [PATCH] soc/intel/xeon_sp: Add support for Emerald Rapids (5th Gen Xeon-SP) CPUs TEST=build/boot ASRock SPC741D8-2L2T/BCM with Intel Xeon Silver 4514Y to edk2 and Linux 6.12 Change-Id: Iefe3228dcf3626aa9a72d16a288751af47d526f6 Signed-off-by: Felix Zimmer Co-authored-by: Yussuf Khalil Reviewed-on: https://review.coreboot.org/c/coreboot/+/87746 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Shuo Liu --- src/include/cpu/intel/cpu_ids.h | 1 + src/soc/intel/xeon_sp/report_platform.c | 1 + src/soc/intel/xeon_sp/spr/cpu.c | 1 + 3 files changed, 3 insertions(+) diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index e14cb797ab..59900077d9 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -57,6 +57,7 @@ #define CPUID_SAPPHIRERAPIDS_SP_E3 0x806f6 #define CPUID_SAPPHIRERAPIDS_SP_E4 0x806f7 #define CPUID_SAPPHIRERAPIDS_SP_Ex 0x806f8 +#define CPUID_EMERALDRAPIDS 0xC06F2 #define CPUID_GRANITERAPIDS 0xA06D0 #define CPUID_SIERRAFOREST 0xA06F0 #define CPUID_ELKHARTLAKE_A0 0x90660 diff --git a/src/soc/intel/xeon_sp/report_platform.c b/src/soc/intel/xeon_sp/report_platform.c index 874ff45d81..8389532dd7 100644 --- a/src/soc/intel/xeon_sp/report_platform.c +++ b/src/soc/intel/xeon_sp/report_platform.c @@ -26,6 +26,7 @@ static struct { { CPUID_SAPPHIRERAPIDS_SP_E3, "Sapphire Rapids E3" }, { CPUID_SAPPHIRERAPIDS_SP_E4, "Sapphire Rapids E4" }, { CPUID_SAPPHIRERAPIDS_SP_Ex, "Sapphire Rapids Ex" }, + { CPUID_EMERALDRAPIDS, "Emerald Rapids" }, }; static void report_cpu_info(void) diff --git a/src/soc/intel/xeon_sp/spr/cpu.c b/src/soc/intel/xeon_sp/spr/cpu.c index 383bf5f512..ec369b2c5c 100644 --- a/src/soc/intel/xeon_sp/spr/cpu.c +++ b/src/soc/intel/xeon_sp/spr/cpu.c @@ -178,6 +178,7 @@ static const struct cpu_device_id cpu_table[] = { {X86_VENDOR_INTEL, CPUID_SAPPHIRERAPIDS_SP_E3, CPUID_EXACT_MATCH_MASK}, {X86_VENDOR_INTEL, CPUID_SAPPHIRERAPIDS_SP_E4, CPUID_EXACT_MATCH_MASK}, {X86_VENDOR_INTEL, CPUID_SAPPHIRERAPIDS_SP_Ex, CPUID_EXACT_MATCH_MASK}, + {X86_VENDOR_INTEL, CPUID_EMERALDRAPIDS, CPUID_EXACT_MATCH_MASK}, CPU_TABLE_END };