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baytrail: introduce ssus_disable_internal_pull()

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Currently gpios are set up in ramstage, but there
are cases where gpios need to be interrogated in
romstage and the reset state of the gpio config does
not allow reading the correct values.  So far all
those cases can be resolved by disabling the internal
pull. Therefore, provide this functionality to all
users and convert rambi over to the common API.

BUG=chrome-os-partner:25641
BRANCH=baytrail
TEST=Built and booted.

Change-Id: I53ecf24e55b6d2efb1eaee3787734178d6961fcf
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185740
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Aaron Durbin 2014-02-10 16:32:07 -06:00 • committed by chrome-internal-fetch
commit 9d6056dd70
2 changed files with 9 additions and 9 deletions
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12
src/mainboard/google/rambi/romstage.c
View file

@ -42,12 +42,6 @@ static const uint32_t dual_channel_config =
#define GPIO_SSUS_38_PAD 50
#define GPIO_SSUS_39_PAD 58
static inline void disable_internal_pull(int pad)
{
const int pull_mask = ~(0xf << 7);
write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
}
static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
{
int ram_id = 0;
@ -55,9 +49,9 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
/* The ram_id[2:0] pullups on rambi are too large for the default 20K
* pulldown on the pad. Therefore, disable the internal pull resistor to
* read high values correctly. */
disable_internal_pull(GPIO_SSUS_37_PAD);
disable_internal_pull(GPIO_SSUS_38_PAD);
disable_internal_pull(GPIO_SSUS_39_PAD);
ssus_disable_internal_pull(GPIO_SSUS_37_PAD);
ssus_disable_internal_pull(GPIO_SSUS_38_PAD);
ssus_disable_internal_pull(GPIO_SSUS_39_PAD);
ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
ram_id |= (ssus_get_gpio(GPIO_SSUS_38_PAD) << 1);

6
src/soc/intel/baytrail/baytrail/gpio.h
View file

@ -378,4 +378,10 @@ static inline int ssus_get_gpio(int pad)
return read32(val_addr) & PAD_VAL_HIGH;
}
static inline void ssus_disable_internal_pull(int pad)
{
const uint32_t pull_mask = ~(0xf << 7);
write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
}
#endif /* _BAYTRAIL_GPIO_H_ */