erebion/coreboot
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mv cachemain.c to stage1.c, so that people can tell when it runs.

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Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@412 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2007-06-29 14:20:02 +00:00
commit 9b9e190491
2 changed files with 1 additions and 1 deletions
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arch/x86/Makefile
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@ -76,7 +76,7 @@ $(obj)/linuxbios.bootblock: $(obj)/linuxbios.vpd $(obj)/stage0.init
STAGE0_LIB_OBJ = uart8250.o mem.o elfboot.o lar.o delay.o vtxprintf.o \
vsprintf.o console.o
STAGE0_ARCH_X86_OBJ = cachemain.o serial.o archelfboot.o speaker.o \
STAGE0_ARCH_X86_OBJ = stage1.o serial.o archelfboot.o speaker.o \
udelay_io.o mc146818rtc.o
ifeq ($(CONFIG_CPU_I586),y)

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arch/x86/cachemain.c → arch/x86/stage1.c
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