From 9b934a661d81331ce284fa98970664160e83ec31 Mon Sep 17 00:00:00 2001
From: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Date: Mon, 18 Feb 2008 01:43:50 +0000
Subject: [PATCH] Update mainboard dts files to new style. Untested, but I
 tried to keep the new settings as close as possible to the old settings. All
 GeodeLX-based boards now include the geodelx/domain, geodelx/apic and
 geodelx/pci dts files.

Remove "enabled" keyword from the alix.1c main dts. (That's the only
possibly critical change because it affects a working target. Tests on
hardware appreciated. Should be harmless, though.)

Compile tested only for msm800sev, norwich and dbe61, and the situation
is better than without the patch.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Tested and boots a working linux on alix1c.

Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@607 f3766cd6-281f-0410-b1cd-43a5c92072e9
---
 mainboard/adl/msm800sev/dts    | 21 +++++++++------------
 mainboard/amd/norwich/dts      | 20 ++++++++------------
 mainboard/artecgroup/dbe61/dts | 20 ++++++++------------
 mainboard/pcengines/alix1c/dts |  1 -
 4 files changed, 25 insertions(+), 37 deletions(-)

diff --git a/mainboard/adl/msm800sev/dts b/mainboard/adl/msm800sev/dts
index 27c595bc1a..671ff64e1a 100644
--- a/mainboard/adl/msm800sev/dts
+++ b/mainboard/adl/msm800sev/dts
@@ -23,22 +23,19 @@
 /{
 	mainboard-vendor = "Advanced Digital Logic";
 	mainboard-name = "MSM800SEV";
-	cpus {
-		enabled;
+	cpus { };
+	apic@0 {
+		/config/("northbridge/amd/geodelx/apic");
 	};
-	domain0 {
-		enabled;
-		pcidomain = "0";
-		device0,0 {
-			enabled;
-			pcipath = "1,0";
+	domain@0 {
+		/config/("northbridge/amd/geodelx/domain");
+		pci@1,0 {
+			/config/("northbridge/amd/geodelx/pci");
 		};
-		southbridge {
+		pci@1,1 {
 			/config/("southbridge/amd/cs5536/dts");
-			pcipath = "1,1";
-			enabled;
 		};
-		superio {
+		ioport@46 {
 			/config/("superio/winbond/w83627hf/dts");
 			com1enable = "1";
 		};
diff --git a/mainboard/amd/norwich/dts b/mainboard/amd/norwich/dts
index 6784517515..3988cdc10d 100644
--- a/mainboard/amd/norwich/dts
+++ b/mainboard/amd/norwich/dts
@@ -19,23 +19,19 @@
  */
 
 /{
-	enabled;
 	mainboard-vendor = "AMD";
 	mainboard-name = "Norwich";
-	cpus {
-		enabled;
+	cpus { };
+	apic@0 {
+		/config/("northbridge/amd/geodelx/apic");
 	};
-	domain0 {
-		enabled;
-		pcidomain = "0";
-		device0,0 {
-			enabled;
-			pcipath = "1,0";
+	domain@0 {
+		/config/("northbridge/amd/geodelx/domain");
+		pci@1,0 {
+			/config/("northbridge/amd/geodelx/pci");
 		};
-		southbridge {
+		pci@1,1 {
 			/config/("southbridge/amd/cs5536/dts");
-			pcipath = "1,1";
-			enabled;
 		};
 	};
 };
diff --git a/mainboard/artecgroup/dbe61/dts b/mainboard/artecgroup/dbe61/dts
index 10762436ca..285702b84b 100644
--- a/mainboard/artecgroup/dbe61/dts
+++ b/mainboard/artecgroup/dbe61/dts
@@ -75,21 +75,17 @@ end
 /{
 	mainboard-vendor = "Artec Group";
 	mainboard-name = "DBE61";
-	enabled;
-	cpus {
-		enabled;
+	cpus { };
+	apic@0 {
+		/config/("northbridge/amd/geodelx/apic");
 	};
-	domain0 {
-		enabled;
-		pcidomain = "0";
-		device0,0 {
-			enabled;
-			pcipath = "1,0";
+	domain@0 {
+		/config/("northbridge/amd/geodelx/domain");
+		pci@1,0 {
+			/config/("northbridge/amd/geodelx/pci");
 		};
-		southbridge {
+		pci@1,1 {
 			/config/("southbridge/amd/cs5536/dts");
-			pcipath = "1,1";
-			enabled;
 		};
 	};
 };
diff --git a/mainboard/pcengines/alix1c/dts b/mainboard/pcengines/alix1c/dts
index a38ebeec53..ee3d6ea2ba 100644
--- a/mainboard/pcengines/alix1c/dts
+++ b/mainboard/pcengines/alix1c/dts
@@ -19,7 +19,6 @@
  */
 
 /{
-	enabled;
 	mainboard-vendor = "PC Engines";
 	mainboard-name = "ALIX1.C";
 	cpus { };