From 9b663182d38876dedccc3507c883b32b2575287e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 29 Jan 2026 23:42:27 +0530 Subject: [PATCH] mb/google/fatcat: Move battery LED logic to platform hook MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch moves the ChromeEC battery-low LED signaling from the Panther Lake SoC romstage code to the Fatcat mainboard-specific romstage. By utilizing the platform_romstage_pre_mem() hook, we remove Google- specific EC logic from the generic Intel SoC directory, adhering better to the separation of concerns between SoC and Mainboard code. - Implement platform_romstage_pre_mem() in google/fatcat. - Remove redundant EC include and LED logic from Panther Lake SoC. Change-Id: I09f7dd516f1a98cf99313db379cfbef5157c9869 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/91000 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N --- src/mainboard/google/fatcat/romstage.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/mainboard/google/fatcat/romstage.c b/src/mainboard/google/fatcat/romstage.c index 8f0000c2ce..2b3452eff8 100644 --- a/src/mainboard/google/fatcat/romstage.c +++ b/src/mainboard/google/fatcat/romstage.c @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include #include +#include #include #include #include @@ -43,3 +45,10 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) /* Override FSP-M UPD per board if required. */ variant_update_soc_memory_init_params(memupd); } + +void platform_romstage_pre_mem(void) +{ + /* Set LED to Red to alert the user visually */ + if (CONFIG(EC_GOOGLE_CHROMEEC) && google_chromeec_is_critically_low_on_battery()) + google_chromeec_set_lightbar_rgb(0xff, 0xff, 0x00, 0x00); +}