mb/google/ocelot/var/ocicat: Update audio settings

Ocicat use ALC3247, and confirm with vendor,
That ALC3247 driver is mapping to ALC236 not AL256.

- Follow ocelot setting, add Audio settings
- Update ALC236 Verb table
- Enable hda codec

BUG=b:469132497
TEST=Flash and boot on DUT, audio works normally

Change-Id: Id60dcaadfefafb499b0555a81192b03b77ad9030
Signed-off-by: Pierce Chou <chou.pierce@inventec.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90518
Reviewed-by: Pranava Y N <pranavayn@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Pierce Chou 2025-12-16 10:36:57 +08:00 committed by Matt DeVillier
commit 9b5d985838
3 changed files with 89 additions and 69 deletions

View file

@ -4,15 +4,16 @@
const u32 cim_verb_data[] = {
/* coreboot specific header */
0x10ec0256, /* Codec Vendor / Device ID: Realtek ALC256 */
0x10ec12ac, /* Subsystem ID */
0x00000013, /* Number of jacks (NID entries) */
0x10ec0236, // Codec Vendor / Device ID: Realtek ALC236
0x103C8C60, // Subsystem ID
0x00000016, // Number of jacks (NID entries)
AZALIA_RESET(0x1),
/* NID 0x01, HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0, 0x10ec12ac),
/* NID 0x01, HDA Codec Subsystem ID Verb table */
AZALIA_SUBVENDOR(0, 0x103C8C60),
/* Pin Widget Verb Table */
/*
* DMIC
* Requirement is to use PCH DMIC. Hence,
@ -20,105 +21,101 @@ const u32 cim_verb_data[] = {
* AZALIA_PIN_CFG(0, 0x12, 0x90A60130),
* AZALIA_PIN_CFG(0, 0x13, 0x40000000),
*/
/* Pin widget 0x14 - Front (Port-D) */
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
/* Pin widget 0x18 - NPC */
AZALIA_PIN_CFG(0, 0x18, 0x411111F0),
/* Pin widget 0x19 - MIC2 (Port-F) */
AZALIA_PIN_CFG(0, 0x19, 0x04A11040),
AZALIA_PIN_CFG(0, 0x19, 0x03A11020),
/* Pin widget 0x1A - LINE1 (Port-C) */
AZALIA_PIN_CFG(0, 0x1a, 0x411111F0),
/* Pin widget 0x1B - NPC */
AZALIA_PIN_CFG(0, 0x1b, 0x411111F0),
/* Pin widget 0x1D - BEEP-IN */
AZALIA_PIN_CFG(0, 0x1d, 0x40610041),
AZALIA_PIN_CFG(0, 0x1d, 0x40600001),
/* Pin widget 0x1E - NPC */
AZALIA_PIN_CFG(0, 0x1e, 0x411111F0),
/* Pin widget 0x21 - HP1-OUT (Port-I) */
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
AZALIA_PIN_CFG(0, 0x21, 0x03211040),
/*
* Widget node 0x20 - 1
* Codec hidden reset and speaker power 2W/4ohm
*/
0x0205001A,
0x0204C003,
0x02050038,
0x02047901,
/*
* Widget node 0x20 - 2
* Class D power on Reset
*/
0x0205003C,
0x02040354,
0x0205003C,
0x02040314,
/*
* Widget node 0x20 - 3
* Disable AGC and set AGC limit to -1.5dB
* Widget node 0x20 - 2
* Set JD2 pull high
*/
0x02050016,
0x02040C50,
0x02050012,
0x0204EBC1,
/*
* Widget node 0x20 - 4
* Set AGC Post gain +1.5dB then Enable AGC
*/
0x02050013,
0x02044023,
0x02050016,
0x02040E50,
/*
* Widget node 0x20 - 5
* Silence detector enabling + Set EAPD to verb control
*/
0x02050037,
0x0204FE15,
0x02050010,
0x02040020,
/*
* Widget node 0x20 - 6
* Silence data mode Threshold (-90dB)
*/
0x02050030,
0x0204A000,
0x0205001B,
0x02040A4B,
0x0205000B,
0x02047778,
/*
* Widget node 0x20 - 7
* Default setting-1
* Widget node 0x20 - 3
*/
0x05750003,
0x05740DA3,
0x02050046,
0x02040004,
/*
* Widget node 0x20 - 8
* support 1 pin detect two port
*/
0x02050009,
0x0204E003,
0x0205000A,
0x02047770,
/*
* Widget node 0x20 - 9
* To set LDO1/LDO2 as default
*/
0x02050008,
0x02046A0C,
0x02050008,
0x02046A0C,
0x05750003,
0x057409A3,
/* disable EQ first */
0x05350000,
0x0534201A,
/* Left Channel */
0x0535001d,
0x05340800,
0x0535001e,
0x05340800,
0x05350003,
0x05341F7B,
0x05350004,
0x05340000,
/* Right Channel */
0x05450000,
0x05442000,
0x0545001d,
0x05440800,
0x0545001e,
0x05440800,
0x05450003,
0x05441F7B,
0x05450004,
0x05440000,
/* enable EQ */
0x05350000,
0x0534E01A,
/* 2.2W/4ohm */
0x02050038,
0x02046901,
/* Disable AGC and set AGC limit to 0dB */
0x02050016,
0x02044C50,
0x02050012,
0x0204EBC0,
/* Set AGC Front and Post gain 0dB then Enable AGC */
0x02050013,
0x0204401F,
0x02050016,
0x02044E50,
/* Headphone Pop */
0x05750007,
0x057412B2,
0x05750007, /* Padding */
0x057412B2, /* Padding */
};
const u32 pc_beep_verbs[] = {
/* Dos beep path - 1 */
0x01470C00,
0x02050036,
0x02047151,
0x01470740,
0x02050010,
0x02040020,
/* Dos beep path - 2 */
0x0143b000,
0x01470C02,
0x0143B000,
0x01470740,
0x01470C02,
0x01470C02,
};

View file

@ -17,6 +17,8 @@ fw_config
end
chip soc/intel/pantherlake
# HD Audio
register "pch_hda_audio_link_hda_enable" = "true"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP1

View file

@ -14,6 +14,11 @@ void variant_update_soc_memory_init_params(FSPM_UPD *memupd)
{
FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
/* HDA Audio */
printk(BIOS_INFO, "Overriding HDA SDI lanes.\n");
m_cfg->PchHdaSdiEnable[0] = true;
m_cfg->PchHdaSdiEnable[1] = false;
/* Override FSP-M SaGv frequency and gear for DDR5 boards */
m_cfg->SaGvFreq[0] = 3200;
m_cfg->SaGvGear[0] = GEAR_4;
@ -46,3 +51,19 @@ void variant_update_soc_memory_init_params(FSPM_UPD *memupd)
memcpy(m_cfg->PhyClockToCkdDimm, phy_clock_to_ckd_dimm,
sizeof(phy_clock_to_ckd_dimm));
}
/*
* HDA verb table loading is supported based on the firmware configuration.
*
* This function determines if the current platform has an HDA codec enabled by
* examining the `FW_CONFIG` value. Specifically, it checks if the
* `FW_CONFIG` includes the `AUDIO_ALC256_HDA` value, which is used to identify
* Fatcat SKUs with HDA codec support.
*
* Return true if the `FW_CONFIG` indicates HDA support (i.e., contains
* `AUDIO_ALC256_HDA`), false otherwise.
*/
bool mainboard_is_hda_codec_enabled(void)
{
return true;
}