From 9a95aef482d31676cec45d3c23e20e2c6732d10e Mon Sep 17 00:00:00 2001 From: Swathi Tamilselvan Date: Thu, 4 Dec 2025 12:14:09 +0530 Subject: [PATCH] soc/qualcomm/common: Add API to enable Lucidole PLL for X1P42100 Add API to enable Lucidole PLL. TEST=Create an image.serial.bin and ensure it boots on X1P42100. Change-Id: Idfefebcbe57498446e32c75d5c1532d321b8fb74 Signed-off-by: Swathi Tamilselvan Reviewed-on: https://review.coreboot.org/c/coreboot/+/90392 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/soc/qualcomm/common/clock.c | 20 +++++++++++++++++++ .../common/include/soc/clock_common.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/src/soc/qualcomm/common/clock.c b/src/soc/qualcomm/common/clock.c index 200e16e5c7..ede523e298 100644 --- a/src/soc/qualcomm/common/clock.c +++ b/src/soc/qualcomm/common/clock.c @@ -302,6 +302,26 @@ enum cb_err zondaole_pll_enable(struct alpha_pll_reg_val_config *cfg) return CB_SUCCESS; } +enum cb_err lucidole_pll_enable(struct alpha_pll_reg_val_config *cfg) +{ + /* + * H/W requires a 1us delay between disabling the bypass and + * de-asserting the reset. + */ + udelay(1); + setbits32(cfg->reg_opmode, PLL_RUN_MODE); + setbits32(cfg->reg_mode, BIT(PLL_RESET_SHFT)); + + if (!wait_us(100, read32(cfg->reg_mode) & PLL_LOCK_DET_BMSK)) { + printk(BIOS_ERR, "CPU PLL did not lock!\n"); + return CB_ERR; + } + + setbits32(cfg->reg_mode, BIT(PLL_OUTCTRL_SHFT)); + + return CB_SUCCESS; +} + /* Bring subsystem out of RESET */ void clock_reset_subsystem(u32 *misc, u32 shft) { diff --git a/src/soc/qualcomm/common/include/soc/clock_common.h b/src/soc/qualcomm/common/include/soc/clock_common.h index f638ce00e6..fd3a073d01 100644 --- a/src/soc/qualcomm/common/include/soc/clock_common.h +++ b/src/soc/qualcomm/common/include/soc/clock_common.h @@ -182,6 +182,8 @@ enum cb_err agera_pll_enable(struct alpha_pll_reg_val_config *cfg); enum cb_err zonda_pll_enable(struct alpha_pll_reg_val_config *cfg); +enum cb_err lucidole_pll_enable(struct alpha_pll_reg_val_config *cfg); + /* * zondaole_pll_enable(): Enable Zondaole PLL at the given configuration (cfg). *