From 9a3eae088cf220db794df59448c659aad3ec3687 Mon Sep 17 00:00:00 2001 From: Mac Chiang Date: Wed, 9 Apr 2025 13:44:59 +0800 Subject: [PATCH] mb/google/fatcat/var/felino: fix DMIC1 recording According to the PTL GPIO implementation summary document, NF2 is a null function pin. Correct to NF3 for DMIC_CLK_A1 and DMIC_DAT_A1 function pins. BUG=b:378629979 Test=emerge-fatcat coreboot Verify DMIC recording functionality. Command: arecord -D hw:0,10 -r 48000 -c 4 -f s32 dmic.wav Signed-off-by: Mac Chiang Change-Id: Ic73b43e6d58376e0c592ef4a1a9c9d9fc7e66928 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87237 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal Reviewed-by: Subrata Banik Reviewed-by: Jayvik Desai --- src/mainboard/google/fatcat/variants/felino/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/fatcat/variants/felino/gpio.c b/src/mainboard/google/fatcat/variants/felino/gpio.c index 3b2a6934e2..a70e9fe09f 100644 --- a/src/mainboard/google/fatcat/variants/felino/gpio.c +++ b/src/mainboard/google/fatcat/variants/felino/gpio.c @@ -182,9 +182,9 @@ static const struct pad_config gpio_table[] = { /* GPP_D15: NC */ PAD_NC(GPP_D15, NONE), /* GPP_D16: PCH_DMIC_CLK1 */ - PAD_CFG_NF(GPP_D16, NONE, DEEP, NF2), + PAD_CFG_NF(GPP_D16, NONE, DEEP, NF3), /* GPP_D17: PCH_DMIC_DATA1 */ - PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2), + PAD_CFG_NF(GPP_D17, NONE, DEEP, NF3), /* GPP_D18: PCIE_CLKREQ_SD_N */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), /* GPP_D19: NC */