diff --git a/src/mainboard/siemens/mc_rpl/devicetree.cb b/src/mainboard/siemens/mc_rpl/devicetree.cb
index a5af508a2f..fdd62466aa 100644
--- a/src/mainboard/siemens/mc_rpl/devicetree.cb
+++ b/src/mainboard/siemens/mc_rpl/devicetree.cb
@@ -13,22 +13,6 @@ chip soc/intel/alderlake
 	# Sagv Configuration
 	register "sagv" = "SaGv_Enabled"
 
-	register "sata_salp_support" = "1"
-
-	register "sata_ports_enable" = "{
-		[0] = 1,
-		[1] = 1,
-		[2] = 1,
-		[3] = 1,
-	}"
-
-	register "sata_ports_dev_slp" = "{
-		[0] = 1,
-		[1] = 1,
-		[2] = 1,
-		[3] = 1,
-	}"
-
 	register "s0ix_enable" = "true"
 	register "dptf_enable" = "true"
 
@@ -130,7 +114,6 @@ chip soc/intel/alderlake
 			end
 		end
 		device ref crashlog off end
-		device ref sata on end
 		device ref p2sb on end
 		device ref smbus on end
 	end
diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
index b6ba91a40d..9e8da22920 100644
--- a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
@@ -3,6 +3,14 @@ chip soc/intel/alderlake
 	# seen on J0 and Q0 SKUs
 	register "disable_package_c_state_demotion" = "true"
 
+	register "sata_salp_support" = "0"
+	register "sata_speed" = "SATA_GEN2"
+
+	register "sata_ports_enable" = "{
+		[0] = 1,
+		[1] = 1,
+	}"
+
 	register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Port1
 	register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"	# Port2
 	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Onboard USB
@@ -128,5 +136,6 @@ chip soc/intel/alderlake
 				device pnp 0c31.0 on end
 			end
 		end
+		device ref sata on end
 	end
 end