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mb/google/ocelot/var/ojal: Enable Audio Codec and update FW config

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This patch enables Cirrus Audio codec and HDA in devicetree for ojal
and updates FW config for GPIO's according to schematics revision 0.9.
RDC kit no:840138

Scope (\_SB.PCI0.HDAS.SNDW)
    {
        Device (SW30)
        {
            Name (_ADR, 0x00033001FA424301)  // _ADR: Address
            Name (_DDN, "Headset Codec")  // _DDN: DOS Device Name
            Name (_SUB, "1337")  // _SUB: Subsystem ID
...

BUG=b:437459757
TEST=Build ojal board and check SSDT tables for codec.

Change-Id: Id4110263750ef5ff2375199d073175b47dc4f909
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bhat D, Krishna P <krishna.p.bhat.d@intel.com>
This commit is contained in:
Varun Upadhyay 2025-12-02 13:34:25 +05:30 • committed by Matt DeVillier
commit 980c269643
2 changed files with 90 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

76
src/mainboard/google/ocelot/variants/ojal/fw_config.c
View file

@ -11,6 +11,74 @@
/* t: table */
#define GPIO_CONFIGURE_PADS(t) gpio_configure_pads(t, ARRAY_SIZE(t))
static const struct pad_config hda_enable_pads[] = {
/* GPP_D10: HDA_BCLK (HDR) */
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
/* GPP_D11: HDA_SYNC (HDR) */
PAD_CFG_NF(GPP_D11, NONE, DEEP, NF1),
/* GPP_D12: HDA_SDO (HDR) */
PAD_CFG_NF(GPP_D12, NONE, DEEP, NF1),
/* GPP_D13: HDA_SDI0 (HDR) */
PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1),
/* GPP_D16: HDA_RST_N (HDR) */
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF1),
/* GPP_D17: HDA_SDI1 (HDR) */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
/* GPP_S04: DMIC0_CLK (HDR) */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF5),
/* GPP_S05: DMIC0_DATA (HDR) */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF5),
/* GPP_S06: DMIC1_CLK (HDR) */
PAD_CFG_NF(GPP_S06, NONE, DEEP, NF5),
/* GPP_S07: DMIC1_DATA (HDR) */
PAD_CFG_NF(GPP_S07, NONE, DEEP, NF5),
};
static const struct pad_config sndw_cs42l43_enable_pads[] = {
/* Soundwire GPIO Config */
/* GPP_S00: SNDW3_CLK_CODEC (HDR) */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
/* GPP_S01: SNDW3_DATA0_CODEC (HDR) */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
/* GPP_S02: SNDW3_DATA1_CODEC (HDR) */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF1),
/* GPP_S04: DMIC0_CLK (HDR) */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF5),
/* GPP_S05: DMIC0_DATA (HDR) */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF5),
};
static const struct pad_config audio_disable_pads[] = {
/* GPP_D10: HDA_BCLK (HDR) */
PAD_NC(GPP_D10, NONE),
/* GPP_D11: HDA_SYNC (HDR) */
PAD_NC(GPP_D11, NONE),
/* GPP_D12: HDA_SDO (HDR) */
PAD_NC(GPP_D12, NONE),
/* GPP_D13: HDA_SDI0 (HDR) */
PAD_NC(GPP_D13, NONE),
/* GPP_D16: HDA_RST_N (HDR) */
PAD_NC(GPP_D16, NONE),
/* GPP_D17: HDA_SDI1 (HDR) */
PAD_NC(GPP_D17, NONE),
/* GPP_S00: SNDW3_CLK_CODEC (HDR) */
PAD_NC(GPP_S00, NONE),
/* GPP_S01: SNDW3_DATA0_CODEC (HDR) */
PAD_NC(GPP_S01, NONE),
/* GPP_S02: SNDW3_DATA1_CODEC (HDR) */
PAD_NC(GPP_S02, NONE),
/* GPP_S03: SNDW3_DATA2_CODEC (HDR) */
PAD_NC(GPP_S03, NONE),
/* GPP_S04: DMIC0_CLK (HDR) */
PAD_NC(GPP_S04, NONE),
/* GPP_S05: DMIC0_DATA (HDR) */
PAD_NC(GPP_S05, NONE),
/* GPP_S06: DMIC1_CLK (HDR) */
PAD_NC(GPP_S06, NONE),
/* GPP_S07: DMIC1_DATA (HDR) */
PAD_NC(GPP_S07, NONE),
};
static const struct pad_config pre_mem_gen4_ssd_pwr_pads[] = {
/* GPP_H18: GEN4_SSD_PWREN */
PAD_CFG_GPO(GPP_H18, 0, PLTRST),
@ -167,6 +235,14 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
GPIO_PADBASED_OVERRIDE(padbased_table, ufs_enable_pads);
}
if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_NONE))) {
GPIO_PADBASED_OVERRIDE(padbased_table, audio_disable_pads);
} else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_CS42L43_SNDW))) {
GPIO_PADBASED_OVERRIDE(padbased_table, sndw_cs42l43_enable_pads);
} else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256_HDA))) {
GPIO_PADBASED_OVERRIDE(padbased_table, hda_enable_pads);
}
if (fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_6)) ||
fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_7))) {
GPIO_PADBASED_OVERRIDE(padbased_table, cnvi_enable_pads);

14
src/mainboard/google/ocelot/variants/ojal/overridetree.cb
View file

@ -306,5 +306,19 @@ chip soc/intel/pantherlake
end
device ref smbus on end
device ref hda on
chip drivers/intel/soundwire
device generic 0 on
chip drivers/soundwire/cs42l43
# SoundWire Link 3 ID 1
register "desc" = ""Headset Codec""
register "sub" = ""1337""
device generic 3.1 on
probe AUDIO AUDIO_CS42L43_SNDW
end
end
end
end
end
end
end