From 97cf4a19198475fb0ff2a944c1e2eb87f4f5f565 Mon Sep 17 00:00:00 2001 From: Alexander Goncharov Date: Mon, 4 Aug 2025 17:56:48 +0300 Subject: [PATCH] util/amdfwtool/amdfwread: fix offset decision for PSP/BIOS directory lookup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to AMD documentation, starting from Family 17h Models 00h-0Fh, the PSP on-chip boot loader reads the PSP directory pointer from offset 0x14 in the Embedded Firmware structure, replacing the previous offset 0x10. The docs do not specify any special value indicating a change of offset. Some AMI binaries use a zero address in this directory field, which caused incorrect offset handling. Change-Id: I67ab763d070a9580a8269b525b203c932c5b1b95 Signed-off-by: Alexander Goncharov Reviewed-on: https://review.coreboot.org/c/coreboot/+/88868 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Michał Żygowski --- util/amdfwtool/amdfwread.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/util/amdfwtool/amdfwread.c b/util/amdfwtool/amdfwread.c index 7013318f81..88ccf3a78d 100644 --- a/util/amdfwtool/amdfwread.c +++ b/util/amdfwtool/amdfwread.c @@ -166,8 +166,8 @@ static int read_soft_fuse(FILE *fw, const embedded_firmware *fw_header) size_t num_current_entries = 0; uint32_t psp_offset = 0; - /* 0xffffffff indicates that the offset is in new_psp_directory */ - if (fw_header->psp_directory != 0xffffffff) + /* 0xffffffff or 0x00000000 indicates that the offset is in new_psp_directory */ + if (fw_header->psp_directory != 0xffffffff && fw_header->psp_directory != 0x00000000) psp_offset = fw_header->psp_directory; else psp_offset = fw_header->new_psp_directory; @@ -390,8 +390,8 @@ static int list_amdfw_psp_dir(FILE *fw, const embedded_firmware *fw_header) { uint32_t psp_offset = 0; - /* 0xffffffff indicates that the offset is in new_psp_directory */ - if (fw_header->psp_directory != 0xffffffff) + /* 0xffffffff or 0x00000000 indicates that the offset is in new_psp_directory */ + if (fw_header->psp_directory != 0xffffffff && fw_header->psp_directory != 0x00000000) psp_offset = fw_header->psp_directory; else psp_offset = fw_header->new_psp_directory; @@ -403,9 +403,10 @@ static int list_amdfw_psp_dir(FILE *fw, const embedded_firmware *fw_header) static int list_amdfw_bios_dir(FILE *fw, const embedded_firmware *fw_header) { - /* 0xffffffff implies that the SoC uses recovery A/B layout. Only BIOS L2 directory - is present and that too as part of PSP L2 directory. */ - if (fw_header->bios3_entry != 0xffffffff) { + /* 0xffffffff or 0x00000000 implies that the SoC uses recovery A/B + layout. Only BIOS L2 directory is present and that too as part of + PSP L2 directory. */ + if (fw_header->bios3_entry != 0xffffffff && fw_header->bios3_entry != 0x00000000) { printf("BIOSL1: Dir 0x%08x\n", fw_header->bios3_entry); amdfw_bios_dir_walk(fw, fw_header->bios3_entry, BHD_COOKIE, 0); }