Add functions to print routes.
I am totally convinced these are right. I am going on travel for a week and want these in your hands. Carl-Daniel as acked these, but for lack of time to get firefox going right now, Current serengeti output DRAM(40)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(48)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(50)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(58)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(60)00000000-00ffffff, ->(4), , , No interleave, 0 DRAM(68)00000000-00ffffff, ->(0), R, W, 8 nodes, 0 DRAM(70)00000000-00ffffff, ->(0), , , No interleave, 0 DRAM(78)00000000-00ffffff, ->(0), , , No interleave, 0 MMIO(80)01a00000-1100ffff, ->(0,2), , , CPU disable 0, Lock 0, Non posted 0 MMIO(88)75060000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0 MMIO(90)51040000-3f00ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0 MMIO(98)00000000-0000ffff, ->(0,0), R, W, CPU disable 0, Lock 0, Non posted 0 MMIO(a0)01c00000-1100ffff, ->(0,1), , , CPU disable 0, Lock 0, Non posted 1 MMIO(a8)75000000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0 MMIO(b0)51040000-0000ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0 MMIO(b8)00000000-0000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non posted 0 PCIIO(c0)00001010-00003110, ->(0,1), , ,VGA 0 ISA 0 PCIIO(c8)00000750-00000000, ->(2,0), , ,VGA 0 ISA 1 PCIIO(d0)00002510-00000000, ->(0,0), , ,VGA 1 ISA 0 PCIIO(d8)00000000-00000000, ->(0,0), , ,VGA 0 ISA 0 CONFIG(e0)00000000-00000000 ->(0,0), CE 0 CONFIG(e4)00000000-00000000 ->(0,0), CE 0 CONFIG(e8)00000000-00000000 ->(0,0), CE 0 CONFIG(ec)00000000-00000000 ->(0,0), CE 0 Either the DRAM output is wrong or there is a real problem with our DRAM programming. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@941 f3766cd6-281f-0410-b1cd-43a5c92072e9
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7 changed files with 310 additions and 2 deletions
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@ -131,6 +131,18 @@
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#define HTIC_INIT_Detect (1<<6)
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/* Function 1 */
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/* the DRAM, MMIO,and PCIIO routing are 64-bit registers, hence the ending at
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* 0x78, 0xb8, and 0xd8
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*/
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#define DRAM_ROUTE_START 0x40
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#define DRAM_ROUTE_END 0x78
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#define MMIO_ROUTE_START 0x80
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#define MMIO_ROUTE_END 0xb8
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#define PCIIO_ROUTE_START 0xc0
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#define PCIIO_ROUTE_END 0xd8
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#define CONFIG_ROUTE_START 0xe0
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#define CONFIG_ROUTE_END 0xec
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#define PCI_IO_BASE0 0xc0
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#define PCI_IO_BASE1 0xc8
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#define PCI_IO_BASE2 0xd0
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@ -683,6 +695,10 @@ void init_fidvid_bsp(unsigned bsp_apicid);
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/* k8/northbridge.c */
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void sdram_initialize(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo);
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/* k8 router printing */
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void showallroutes(int level, u32 dev);
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/* k8/reset_test.c */
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void distinguish_cpu_resets(unsigned nodeid);
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