From 973beef0cfab28fb67ef6f46761a1da68302279b Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Mon, 24 Jun 2013 20:02:01 +0800 Subject: [PATCH] armv7/pit: Setup EC on SPI2. The Embedded Controller (EC) for Pit is connected via SPI2, and needs to be configured before we can talk to it. BUG=chrome-os-partner:20441 TEST=emerge-peach_pit chromeos-coreboot-peach_pit; boot successfully. BRANCH=none Change-Id: Ic260d89a4aad0633868800af9c331ce8cf7a518f Reviewed-on: https://gerrit.chromium.org/gerrit/59751 Tested-by: Hung-Te Lin Reviewed-by: David Hendricks Commit-Queue: Hung-Te Lin --- src/mainboard/google/pit/romstage.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index 41b64b2893..7ba66a4a35 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -122,6 +122,14 @@ static void setup_storage(void) exynos_pinmux_sdmmc2(); } +static void setup_ec(void) +{ + /* SPI2 (EC) is slower and needs to work in half-duplex mode with + * single byte bus width. */ + clock_set_rate(PERIPH_ID_SPI2, 500000); + exynos_pinmux_spi2(); +} + static void setup_graphics(void) { exynos_pinmux_dphpd(); @@ -271,6 +279,7 @@ void main(void) setup_storage(); setup_gpio(); setup_graphics(); + setup_ec(); simple_spi_test(); /* Set SPI (primary CBFS media) clock to 50MHz. */