From 95a79aff57ec7bf4bcbf0207a017c9dab10c1919 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 22 Jan 2014 10:53:06 -0600 Subject: [PATCH] baytrail: allow configuration of io hole size The updated MRC wrapper allow the IO hole size to be configured from the coreboot side of things. BUG=None BRANCH=baytrail CQ-DEPEND=CL:*152595 TEST=Built and booted. Also changed io hole size from mainboard as test. Change-Id: I7a626764aecce94bbaf35d884606480f22a9aa84 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/183269 Reviewed-by: Duncan Laurie --- src/soc/intel/baytrail/baytrail/mrc_wrapper.h | 3 ++- src/soc/intel/baytrail/romstage/raminit.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/baytrail/baytrail/mrc_wrapper.h b/src/soc/intel/baytrail/baytrail/mrc_wrapper.h index 2074100a2a..893debc34f 100644 --- a/src/soc/intel/baytrail/baytrail/mrc_wrapper.h +++ b/src/soc/intel/baytrail/baytrail/mrc_wrapper.h @@ -28,7 +28,7 @@ #ifndef _MRC_WRAPPER_H_ #define _MRC_WRAPPER_H_ -#define MRC_PARAMS_VER 2 +#define MRC_PARAMS_VER 3 #define NUM_CHANNELS 2 @@ -79,6 +79,7 @@ struct mrc_params { int txe_size_mb; /* TXE memory size in megabytes. */ int rmt_enabled; /* Enable RMT training + prints. */ + int io_hole_mb; /* Size of IO hole in MiB. */ /* Outputs */ void *txe_base_address; diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index 041853215d..573f370097 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -128,6 +128,11 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) #if CONFIG_MRC_RMT mp->rmt_enabled = 1; #endif + + /* Default to 2GiB IO hole. */ + if (!mp->io_hole_mb) + mp->io_hole_mb = 2048; + if (recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); } else if (!mrc_cache_get_current(&cache)) {