From 957b71ac5efe4eb9a30c9038dcfb4dcfb87433a2 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 17 Apr 2017 18:47:16 -0500 Subject: [PATCH] UPSTREAM: soc/baytrail: add ACPI method to generate USB port info Add ACPI method GPLD to generate port location data when passed visiblity info. Will be used by _PLD method in board-specific USB .asl files. BUG=none BRANCH=none TEST=none Change-Id: If6176002997104b4d1470e6a0643b131262d965e Signed-off-by: Patrick Georgi Original-Commit-Id: fab0a49019146c7273adacad3b77445493581a9a Original-Change-Id: Iad947ae2cd541d3407455b218c2b352b9a373718 Original-Signed-off-by: Matt DeVillier Original-Reviewed-on: https://review.coreboot.org/19973 Original-Reviewed-by: Martin Roth Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/523967 --- src/soc/intel/baytrail/acpi/xhci.asl | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl index bef0b9ff2f..d3c0083c2f 100644 --- a/src/soc/intel/baytrail/acpi/xhci.asl +++ b/src/soc/intel/baytrail/acpi/xhci.asl @@ -23,6 +23,23 @@ Device (XHCI) Device (RHUB) { Name (_ADR, 0x00000000) + + // GPLD: Generate Port Location Data (PLD) + Method (GPLD, 1, Serialized) { + Name (PCKG, Package (0x01) { + Buffer (0x10) {} + }) + + // REV: Revision 0x02 for ACPI 5.0 + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (0x02, REV) + + // VISI: Port visibility to user per port + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) + Return (PCKG) + } + Device (PRT1) { Name (_ADR, 1) } Device (PRT2) { Name (_ADR, 2) } Device (PRT3) { Name (_ADR, 3) }