mb/amd/birman_plus: Update devicetree
The devicetree was still a copy of a previous mainboard. This patch updates the devicetree for the birman_plus mainboard. Birman plus is an AMD reference board. sources: - document #58168 Rev 1.01 "Birman+ User Guide" - birman+ schematic Change-Id: I1cc2e4c8f722048b24d84cf782855ae7a8d64c42 Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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2 changed files with 43 additions and 12 deletions
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@ -6,6 +6,7 @@ config BOARD_AMD_BIRMANPLUS_COMMON
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select EC_ACPI
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select SOC_AMD_COMMON_BLOCK_USE_ESPI if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
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select DRIVERS_PCIE_RTD3_DEVICE
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select DRIVERS_I2C_GENERIC
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select MAINBOARD_HAS_CHROMEOS
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select PCIEXP_ASPM
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select PCIEXP_CLK_PM
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@ -1,7 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# TODO: Update for birmanplus
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chip soc/amd/glinda
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register "common_config.espi_config" = "{
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.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN | ESPI_DECODE_IO_0X60_0X64_EN,
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@ -178,20 +176,40 @@ chip soc/amd/glinda
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.ComboPhyStaticConfig[2] = USB_COMBO_PHY_MODE_USB_C,
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}"
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register "gpp_clk_config[0]" = "GPP_CLK_REQ"
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register "gpp_clk_config[1]" = "GPP_CLK_REQ"
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register "gpp_clk_config[2]" = "GPP_CLK_OFF"
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register "gpp_clk_config[3]" = "GPP_CLK_REQ"
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register "gpp_clk_config[0]" = "GPP_CLK_REQ" # MXM
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register "gpp_clk_config[1]" = "GPP_CLK_REQ" # NVMe SSD1
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register "gpp_clk_config[2]" = "GPP_CLK_REQ" # NVMe SSD0
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register "gpp_clk_config[3]" = "GPP_CLK_REQ" # WLAN
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register "gpp_clk_config[4]" = "GPP_CLK_REQ" # WWAN
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register "gpp_clk_config[5]" = "GPP_CLK_REQ" # SD
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register "gpp_clk_config[6]" = "GPP_CLK_REQ" # GBE
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device domain 0 on
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device ref iommu on end
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device ref gpp_bridge_2_1 on end # GBE
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device ref gpp_bridge_2_2 on end # WIFI
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device ref gpp_bridge_2_3 on end # NVMe SSD
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device ref gpp_bridge_2_1 on end # NVME SSD0
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device ref gpp_bridge_2_2 on end # SD
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device ref gpp_bridge_2_3 on end # WLAN
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device ref gpp_bridge_2_4 on end # GBE
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device ref gpp_bridge_2_5 on end # WWAN
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device ref gpp_bridge_3_1 on end # PCIe x4/x8 (ENABLE_SSD1_BIRMANPLUS)
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device ref gpp_bridge_3_2 on end # NVME SSD1 (ENABLE_SSD1_BIRMANPLUS)
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device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
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device ref gfx on end # Internal GPU (GFX)
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device ref gfx_hda on end # Display HD Audio Controller (GFXAZ)
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device ref crypto on end # Crypto Coprocessor
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device ref xhci_1 on # USB 3.1 (USB1)
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chip drivers/usb/acpi
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device ref xhci_1_root_hub on
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chip drivers/usb/acpi
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device ref usb3_port7 on end
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end
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chip drivers/usb/acpi
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device ref usb2_port7 on end
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end
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end
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end
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end
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device ref acp on end # Audio Processor (ACP)
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end
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device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
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@ -216,9 +234,13 @@ chip soc/amd/glinda
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chip drivers/usb/acpi
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device ref usb2_port5 on end
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end
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chip drivers/usb/acpi
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device ref usb2_port6 on end
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end
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end
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end
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end
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device ref usb4_xhci_0 on
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chip drivers/usb/acpi
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device ref usb4_xhci_0_root_hub on
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@ -232,7 +254,6 @@ chip soc/amd/glinda
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end
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end
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device ref usb4_xhci_1 on
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ops xhci_pci_ops
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chip drivers/usb/acpi
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register "type" = "UPC_TYPE_HUB"
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device ref usb4_xhci_1_root_hub on
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@ -250,8 +271,17 @@ chip soc/amd/glinda
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device ref i2c_0 on end
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device ref i2c_1 on end
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device ref i2c_2 on end
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device ref i2c_2 on
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chip drivers/i2c/generic
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "desc" = ""TMP420 3 channel temperature sensor""
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register "uid" = "1"
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register "compat_string" = ""ti,tmp432""
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device i2c 4d on end
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end
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end
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device ref i2c_3 on end
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device ref uart_0 on end # UART0
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device ref uart_2 on end # UART2
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device ref uart_4 on end # UART4
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end
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