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UPSTREAM: soc/intel/common: Add common Intel timer code

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Add common timer code to get tsc frequency(Mhz).

BUG=none
BRANCH=none
TEST=none

Change-Id: I9949c70ab17a40634a74cb8687dc074137280dbe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1fa16c9cb6
Original-Change-Id: Ifd4b24735c74c636348fc32afbcc267e384cb610
Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Original-Reviewed-on: https://review.coreboot.org/19911
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/524602
This commit is contained in:
Aamir Bohra 2017-05-25 13:49:53 +05:30 • committed by chrome-bot
commit 94ce9dbbc9
3 changed files with 34 additions and 0 deletions
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4
src/soc/intel/common/block/timer/Kconfig Normal file
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config SOC_INTEL_COMMON_BLOCK_TIMER
bool
help
Intel Processor common TIMER support

6
src/soc/intel/common/block/timer/Makefile.inc Normal file
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c

24
src/soc/intel/common/block/timer/timer.c Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
#include <intelblocks/msr.h>
unsigned long tsc_freq_mhz(void)
{
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
return (CONFIG_CPU_BCLK_MHZ * ((msr.lo >> 8) & 0xff));
}