diff --git a/src/mainboard/leadtek/winfast6300/dll.inc b/src/mainboard/leadtek/winfast6300/dll.inc index ed7f38e391..112e2eab08 100644 --- a/src/mainboard/leadtek/winfast6300/dll.inc +++ b/src/mainboard/leadtek/winfast6300/dll.inc @@ -1,15 +1,15 @@ /* Table for DLL Clock Control Register (0x8c - 0x8f), these register values are very Mainboard specific */ -# Reg. Value +# High Byte -> Register Low Byte -> Value #ifndef SIS630S - .byte 0x8c, 0x66 - .byte 0x8d, 0x66 - .byte 0x8e, 0x03 - .byte 0x8f, 0x55 + .word 0x8c66 + .word 0x8d66 + .word 0x8e03 + .word 0x8f55 #else /* SIS630S */ - .byte 0x8c, 0x27 # set Clock DLL control register - .byte 0x8d, 0x77 # 0x8c ~ 0x8f, - .byte 0x8e, 0x01 # these values are very M/B - .byte 0x8f, 0x07 # specific + .word 0x8c27 # set Clock DLL control register + .word 0x8d77 # 0x8c ~ 0x8f, + .word 0x8e01 # these values are very M/B + .word 0x8f07 # specific #endif /* SIS630S */ \ No newline at end of file diff --git a/src/mainboard/matsonic/ms7308e/dll.inc b/src/mainboard/matsonic/ms7308e/dll.inc index 7792b453e1..70c913eb66 100644 --- a/src/mainboard/matsonic/ms7308e/dll.inc +++ b/src/mainboard/matsonic/ms7308e/dll.inc @@ -1,15 +1,15 @@ /* Table for DLL Clock Control Register (0x8c - 0x8f), these register values are very Mainboard specific */ -# Reg. Value - .byte 0x8c, 0x66 - .byte 0x8d, 0x66 - .byte 0x8e, 0x03 - .byte 0x8f, 0x55 +# High Byte -> Register Low Byte -> Value + .word 0x8c66 + .word 0x8d66 + .word 0x8e03 + .word 0x8f55 #ifdef SIS630S - .byte 0x8c, 0x27 # set Clock DLL control register - .byte 0x8d, 0x77 # 0x8c ~ 0x8f, - .byte 0x8e, 0x01 # these values are very M/B - .byte 0x8f, 0x07 # specific + .word 0x8c27 # set Clock DLL control register + .word 0x8d77 # 0x8c ~ 0x8f, + .word 0x8e01 # these values are very M/B + .word 0x8f07 # specific #endif /* SIS630S */ \ No newline at end of file diff --git a/src/northsouthbridge/sis/630/ipl.S b/src/northsouthbridge/sis/630/ipl.S index 00f8433db8..e4e3f59bab 100644 --- a/src/northsouthbridge/sis/630/ipl.S +++ b/src/northsouthbridge/sis/630/ipl.S @@ -112,15 +112,26 @@ check_row_column: jl no_sdram #endif /* SAFTY_CHECK */ - subb $0x0b, %ch +#if 1 + subb $0x0b, %ch # row = row - 11 + shlb $0x02, %ch # row * 4 + + addb %ch, %cl # column + row * 4 + movzbw %cl, %bx # Get the SDRAM type. + + addw %bx, %si # sdram_type_bank[column + row * 4] + movb -8(%si), %cl # sdram_type_bank[column + row * 4 - 8] +#else + /* This one is DANGEROUS TOO, be careful about OVERFLOW !!! */ shlb $0x02, %ch # row * 4 addb %ch, %cl # column + row *4 - movzbw %cl, %bx # Get the SDRAM type. - - addw %bx, %si - movb -8(%si), %cl # sdram_type_bank[column + row *4] + xorb %ch, %ch + addw %cx, %si # sdram_type_bank[column + row * 4] + movb -52(%si), %cl # sdram_type_bank[column + row * 4 - 52] +#endif + #ifdef SIZE_ALL movb %ah, %bh # Restore DIMM slot number from AH to BH #endif /* SIZE_ALL */ @@ -184,15 +195,11 @@ no_sdram: movw $pci_init_table, %si init_sdram: - movb (%si), %ah - testb %ah, %ah + lodsw (%si), %ax + testw %ax, %ax jz init_complete - incw %si - movb (%si), %al CALL_SP(write_pci_register) - - incw %si jmp init_sdram init_complete: @@ -367,17 +374,17 @@ sdram_type_bank_2: .byte 0b0011, 0b0111, 0b1011, 0b1111 # 13 pci_init_table: -# Reg. Value +# High Byte -> Register Low Byte -> Value #include "dll.inc" - .byte 0x57, 0x80 # Precharge - .byte 0x57, 0x40 # Mode Register Set - .byte 0x57, 0x20 # Refresh - .byte 0x57, 0x20 # Refresh - .byte 0x57, 0x20 # Refresh - .byte 0x52, 0x01 # Refresh Cycle Enable - .byte 0x00 /* Null, End of table */ + .word 0x5780 # Precharge + .word 0x5740 # Mode Register Set + .word 0x5720 # Refresh + .word 0x5720 # Refresh + .word 0x5720 # Refresh + .word 0x5201 # Refresh Cycle Enable + .word 0x0000 /* Null, End of table */ .org 0x01f0 reset_vector: diff --git a/src/northsouthbridge/sis/630/raminit.inc b/src/northsouthbridge/sis/630/raminit.inc index 87f88cd139..d1f76c7de9 100644 --- a/src/northsouthbridge/sis/630/raminit.inc +++ b/src/northsouthbridge/sis/630/raminit.inc @@ -40,12 +40,9 @@ register_setting_start: shrl $0x01, %ecx init_northbridge: - movw (%esi), %ax # load the register address/value to %ax + lodsw (%esi), %ax # load the register address/value to %ax xchgb %al, %ah # exchange address/values for write_common call write_northbridge_register - - addl $0x02, %esi - decl %ecx loopnz init_northbridge jmp register_setting_end