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soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE

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Intel TXT requires the debug interface to be disabled. There is no
way to program the MSR_IA32_DEBUG_INTERFACE using FSP as needed, so
let coreboot handle it.

TEST=Boot Linux with tboot on Protectli VP4670 with Intel TXT enabled

Change-Id: I7ed4382bbe68f03e8eca151245c13928609f434f
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Michał Żygowski 2024-08-01 11:46:55 +02:00 • committed by Matt DeVillier
commit 940d1d0868
3 changed files with 29 additions and 0 deletions
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3
src/include/cpu/intel/msr.h
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@ -15,6 +15,9 @@
#define MSR_BC_PBEC 0x139
#define B_STOP_PBET (1 << 0)
#define MSR_IA32_DEBUG_INTERFACE 0xc80
#define MSR_IA32_DEBUG_INTERFACE_EN (1 << 0)
#define MSR_IA32_DEBUG_INTERFACE_LOCK (1 << 30)
#define MSR_BOOT_GUARD_SACM_INFO 0x13a
#define V_TPM_PRESENT_MASK 0x06
#define B_BOOT_GUARD_SACM_INFO_NEM_ENABLED (1 << 0)