src/soc/amd/* : Move CPU init in common code

AMD SoC from family 17h share common cpu init code.
Move those to common/block/cpu/noncar/cpu.c

TEST=Build for glinda SoC & check for boot.

Change-Id: If53455f359302f368f7c979defa2c1088c5c2f16
Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/amd/cezanne/cpu.c

@@ -1,8 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
@@ -10,16 +8,8 @@
 _Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of "
 	"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
 
-static void zen_2_3_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = zen_2_3_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {

src/soc/amd/common/block/cpu/noncar/cpu.c

@@ -1,10 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/cpu.h>
+#include <amdblocks/mca.h>
 #include <arch/cpuid.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/cpuid.h>
+#include <cpu/amd/microcode.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <smbios.h>
@@ -100,3 +102,14 @@ unsigned int get_reserved_phys_addr_bits(void)
 	return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >>
 			CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT;
 }
+
+void amd_cpu_init(struct device *dev)
+{
+	if (CONFIG(SOC_AMD_COMMON_BLOCK_MCA_COMMON))
+		check_mca();
+
+	set_cstate_io_addr();
+
+	if (CONFIG(SOC_AMD_COMMON_BLOCK_UCODE))
+		amd_apply_microcode_patch();
+}

src/soc/amd/common/block/include/amdblocks/cpu.h

@@ -22,5 +22,6 @@ uint32_t get_pstate_latency(void);
 uint32_t get_pstate_core_freq(union pstate_msr pstate_reg);
 uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg);
 const acpi_cstate_t *get_cstate_config_data(size_t *size);
+void amd_cpu_init(struct device *dev);
 
 #endif /* AMD_BLOCK_CPU_H */

src/soc/amd/genoa_poc/cpu.c

@@ -1,22 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
 
-static void model_19_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = model_19_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {

src/soc/amd/glinda/cpu.c

@@ -3,8 +3,6 @@
 /* TODO: Update for Glinda */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
@@ -12,16 +10,8 @@
 _Static_assert(CONFIG_MAX_CPUS == 24, "Do not override MAX_CPUS. To reduce the number of "
 	"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
 
-static void zen_2_3_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = zen_2_3_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {

src/soc/amd/mendocino/cpu.c

@@ -1,8 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
@@ -10,16 +8,8 @@
 _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of "
 	"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
 
-static void zen_2_3_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = zen_2_3_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {

src/soc/amd/phoenix/cpu.c

@@ -3,8 +3,6 @@
 /* TODO: Update for Phoenix */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
@@ -12,16 +10,8 @@
 _Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of "
 	"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
 
-static void zen_2_3_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = zen_2_3_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {

src/soc/amd/picasso/cpu.c

@@ -1,8 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/cpu.h>
-#include <amdblocks/mca.h>
-#include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <device/device.h>
 #include <soc/cpu.h>
@@ -10,16 +8,8 @@
 _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of "
 	"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
 
-static void model_17_init(struct device *dev)
-{
-	check_mca();
-	set_cstate_io_addr();
-
-	amd_apply_microcode_patch();
-}
-
 static struct device_operations cpu_dev_ops = {
-	.init = model_17_init,
+	.init = amd_cpu_init,
 };
 
 static struct cpu_device_id cpu_table[] = {