mb/google/*: Explicitly include static.h for DEV_PTR

As per commit 05a13e7ed9 ("sconfig: Move (WEAK_)DEV_PTR from device.h
to static.h"), sources that require access to devicetree static devices
should directly include static.h. This allows static.h to be removed
from device.h, eliminating unnecessary dependencies on the devicetree
for objects that only need the device types and function declarations.

The DEV_PTR macro resolves to names declared in static_devices.h, which
is then included in static.h, so include the header whenever the macro
is used.

Change-Id: I05662e601af00866b7f26f4c6c6794b491bf676e
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84678
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/brox/variants/brox/fw_config.c

@@ -4,6 +4,7 @@
 #include <drivers/intel/ish/chip.h>
 #include <fw_config.h>
 #include <gpio.h>
+#include <static.h>
 
 #define ISH_FIRMWARE_NAME "brox_ish.bin"
 

src/mainboard/google/brox/variants/brox/ramstage.c

@@ -5,6 +5,7 @@
 #include <device/pci_ids.h>
 #include <ec/google/chromeec/ec.h>
 #include <intelblocks/power_limit.h>
+#include <static.h>
 
 /*
  * SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts),

src/mainboard/google/brya/mainboard.c

@@ -11,6 +11,7 @@
 #include <security/tpm/tss.h>
 #include <soc/gpio.h>
 #include <soc/ramstage.h>
+#include <static.h>
 #include <stdio.h>
 
 WEAK_DEV_PTR(rp6_wwan);

src/mainboard/google/brya/variants/agah/variant.c

@@ -7,6 +7,7 @@
 #include <delay.h>
 #include <device/pci.h>
 #include <gpio.h>
+#include <static.h>
 #include <timer.h>
 #include <types.h>
 

src/mainboard/google/brya/variants/aurash/ramstage.c

@@ -11,6 +11,7 @@
 #include <fw_config.h>
 #include <intelblocks/power_limit.h>
 #include <drivers/intel/dptf/chip.h>
+#include <static.h>
 
 const struct cpu_power_limits limits[] = {
 	/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */

src/mainboard/google/brya/variants/craask/variant.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <static.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {

src/mainboard/google/brya/variants/craaskov/variant.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <static.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {

src/mainboard/google/brya/variants/hades/variant.c

@@ -7,6 +7,7 @@
 #include <delay.h>
 #include <device/pci.h>
 #include <gpio.h>
+#include <static.h>
 #include <timer.h>
 #include <types.h>
 

src/mainboard/google/brya/variants/joxer/variant.c

@@ -8,6 +8,7 @@
 #include <fw_config.h>
 #include <soc/bootblock.h>
 #include <sar.h>
+#include <static.h>
 
 WEAK_DEV_PTR(dptf_policy);
 

src/mainboard/google/brya/variants/kinox/ramstage.c

@@ -9,6 +9,7 @@
 #include <drivers/intel/dptf/chip.h>
 #include <ec/google/chromeec/ec.h>
 #include <intelblocks/power_limit.h>
+#include <static.h>
 
 WEAK_DEV_PTR(dptf_policy);
 

src/mainboard/google/brya/variants/moli/ramstage.c

@@ -13,6 +13,7 @@
 #include <drivers/intel/dptf/chip.h>
 #include <boardid.h>
 #include <soc/intel/common/block/pcie/rtd3/chip.h>
+#include <static.h>
 #include <acpi/acpi_device.h>
 
 static void devtree_update_emmc_rtd3(void)

src/mainboard/google/brya/variants/primus/variant.c

@@ -6,6 +6,7 @@
 #include <drivers/i2c/hid/chip.h>
 #include <fw_config.h>
 #include <gpio.h>
+#include <static.h>
 
 static void devtree_update_emmc_rtd3(uint32_t board_ver)
 {

src/mainboard/google/brya/variants/quandiso/variant.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <static.h>
 
 void variant_devtree_update(void)
 {

src/mainboard/google/brya/variants/vell/variant.c

@@ -4,6 +4,7 @@
 #include <boardid.h>
 #include <sar.h>
 #include <soc/pci_devs.h>
+#include <static.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {

src/mainboard/google/brya/variants/yaviks/variant.c

@@ -7,6 +7,7 @@
 #include <drivers/intel/gma/opregion.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <static.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {

src/mainboard/google/brya/variants/yavilla/variant.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <fw_config.h>
 #include <sar.h>
+#include <static.h>
 
 void variant_devtree_update(void)
 {

src/mainboard/google/guybrush/mainboard.c

@@ -12,6 +12,7 @@
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>
 #include <gpio.h>
+#include <static.h>
 #include <variant/ec.h>
 
 #define BACKLIGHT_GPIO			GPIO_129

src/mainboard/google/guybrush/port_descriptors.c

@@ -5,6 +5,7 @@
 #include <device/pci_def.h>
 #include <gpio.h>
 #include <soc/platform_descriptors.h>
+#include <static.h>
 #include <types.h>
 
 /* All PCIe Resets are handled in coreboot */

src/mainboard/google/guybrush/variants/guybrush/variant.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <amdblocks/cpu.h>
 #include <gpio.h>
+#include <static.h>
 
 bool variant_has_pcie_wwan(void)
 {

src/mainboard/google/guybrush/variants/nipperkin/ramstage.c

@@ -6,6 +6,7 @@
 #include <drivers/i2c/tpm/chip.h>
 #include <drivers/uart/acpi/chip.h>
 #include <gpio.h>
+#include <static.h>
 
 static void cr50_devtree_update(void)
 {

src/mainboard/google/hatch/variants/jinlon/mainboard.c

@@ -4,6 +4,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <device/device.h>
+#include <static.h>
 #include <variant/sku.h>
 
 static bool eps_sku(uint32_t sku_id)

src/mainboard/google/rex/mainboard.c

@@ -9,6 +9,7 @@
 #include <ec/ec.h>
 #include <fw_config.h>
 #include <soc/ramstage.h>
+#include <static.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <vendorcode/google/chromeos/chromeos.h>

src/mainboard/google/skyrim/mainboard.c

@@ -9,6 +9,7 @@
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>
+#include <static.h>
 #include <variant/ec.h>
 
 /* The IRQ mapping in fch_irq_map ends up getting written to the indirect address space that is

src/mainboard/google/volteer/mainboard.c

@@ -12,6 +12,7 @@
 #include <intelblocks/tcss.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
+#include <static.h>
 #include <stdio.h>
 #include <variant/gpio.h>
 #include <vb2_api.h>

src/mainboard/google/volteer/variants/collis/variant.c

@@ -4,6 +4,7 @@
 #include <fw_config.h>
 #include <drivers/i2c/hid/chip.h>
 #include <device/device.h>
+#include <static.h>
 
 static void audio_codec_update(void)
 {

src/mainboard/google/volteer/variants/copano/variant.c

@@ -4,6 +4,7 @@
 #include <fw_config.h>
 #include <drivers/i2c/hid/chip.h>
 #include <device/device.h>
+#include <static.h>
 
 static void audio_codec_update(void)
 {

src/mainboard/google/volteer/variants/delbin/variant.c

@@ -4,6 +4,7 @@
 #include <fw_config.h>
 #include <drivers/i2c/hid/chip.h>
 #include <device/device.h>
+#include <static.h>
 
 static void audio_codec_update(void)
 {

src/mainboard/google/volteer/variants/drobit/variant.c

@@ -4,6 +4,7 @@
 #include <fw_config.h>
 #include <drivers/i2c/hid/chip.h>
 #include <device/device.h>
+#include <static.h>
 
 static void audio_codec_update(void)
 {

src/mainboard/google/volteer/variants/volteer2/variant.c

@@ -3,6 +3,7 @@
 #include <baseboard/variants.h>
 #include <soc/pci_devs.h>
 #include <acpi/acpi_device.h>
+#include <static.h>
 
 /*
  * This function runs only on the volteer_ti50 variant, which has the GSC on a

src/mainboard/google/zork/variants/berknip/variant.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
+#include <static.h>
 
 void variant_devtree_update(void)
 {

src/mainboard/google/zork/variants/ezkinil/variant.c

@@ -4,6 +4,7 @@
 #include <device/device.h>
 #include <soc/pci_devs.h>
 #include <ec/google/chromeec/ec.h>
+#include <static.h>
 
 void variant_devtree_update(void)
 {

src/mainboard/google/zork/variants/morphius/variant.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
+#include <static.h>
 
 #define MORPHIUS_SKU_1  0x5A010010
 #define MORPHIUS_SKU_2  0x5A010011