From 932a5a3803ceaf430ad2934b371ac0886c25efca Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Mon, 24 Feb 2014 08:01:25 -0800 Subject: [PATCH] rambi: Apply DPTF tuning parameters This is the first round of DPTF tuning for Rambi platform. - Set TSR0 _PSV to 48C - Set TSR2 _PSV to 55C - Set TCPU _PSV to 80 and _CRT to 90 - Set mainboard _PDL to 8 (1ghz) - Set _TRT sampling period to 60 seconds for all but CPU2CPU BUG=chrome-os-partner:17279 BRANCH=baytrail TEST=build and boot on rambi Change-Id: Ifcb078580fe674a5ad66559293508dcc6cf136f5 Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/187577 Reviewed-by: Aaron Durbin --- src/mainboard/google/rambi/acpi/dptf.asl | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/src/mainboard/google/rambi/acpi/dptf.asl b/src/mainboard/google/rambi/acpi/dptf.asl index 2a2dca65d6..975c9396f1 100644 --- a/src/mainboard/google/rambi/acpi/dptf.asl +++ b/src/mainboard/google/rambi/acpi/dptf.asl @@ -1,9 +1,9 @@ -#define DPTF_CPU_PASSIVE 60 -#define DPTF_CPU_CRITICAL 70 +#define DPTF_CPU_PASSIVE 80 +#define DPTF_CPU_CRITICAL 90 #define DPTF_TSR0_SENSOR_ID 1 #define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" -#define DPTF_TSR0_PASSIVE 60 +#define DPTF_TSR0_PASSIVE 48 #define DPTF_TSR0_CRITICAL 70 #define DPTF_TSR1_SENSOR_ID 2 @@ -13,7 +13,7 @@ #define DPTF_TSR2_SENSOR_ID 3 #define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" -#define DPTF_TSR2_PASSIVE 60 +#define DPTF_TSR2_PASSIVE 55 #define DPTF_TSR2_CRITICAL 70 #define DPTF_ENABLE_CHARGER @@ -27,23 +27,26 @@ Name (CHPS, Package () { Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */ }) +/* Mainboard specific _PDL is 1GHz */ +Name (MPDL, 8) + Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TCPU, 100, 50, 0, 0, 0, 0 }, /* CPU Effect on Temp Sensor 0 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR0, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, #ifdef DPTF_ENABLE_CHARGER /* Charger Effect on Temp Sensor 1 */ - Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 }, #endif /* CPU Effect on Temp Sensor 1 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR1, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 }, /* CPU Effect on Temp Sensor 2 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR2, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, }) /* Include Baytrail DPTF */