From 932152b16c3943b00bd317e7370402dda451529f Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Fri, 1 Aug 2014 10:59:20 -0700 Subject: [PATCH] samus: Disable CMDPWR on broadwell Workaround for auto shutdown issue on broadwell SKU. Now we can see C7 transition, and MRC fastboot BUG=chrome-os-partner:29787,chrome-os-partner:29117 BRANCH=None TEST=build ok and boot on samus Signed-off-by: Kane Chen Change-Id: Id1f174b67fa3e6f248dd8b21aee25e6e01abf33e Reviewed-on: https://chromium-review.googlesource.com/210870 Reviewed-by: Duncan Laurie Tested-by: Kane Chen Commit-Queue: Kane Chen --- src/mainboard/google/samus/romstage.c | 3 +-- src/soc/intel/broadwell/broadwell/pei_data.h | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c index 5c6e40d23e..5a9e781d04 100644 --- a/src/mainboard/google/samus/romstage.c +++ b/src/mainboard/google/samus/romstage.c @@ -60,8 +60,7 @@ void mainboard_romstage_entry(struct romstage_params *rp) * Disable use of PEI saved data to work around memory issues. */ if (cpu_family_model() == BROADWELL_FAMILY_ULT) { - pei_data.disable_self_refresh = 1; - pei_data.disable_saved_data = 1; + pei_data.disable_cmd_pwr = 1; } /* Initliaze memory */ diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/broadwell/pei_data.h index 07b04d24d4..19b4451f89 100644 --- a/src/soc/intel/broadwell/broadwell/pei_data.h +++ b/src/soc/intel/broadwell/broadwell/pei_data.h @@ -124,6 +124,8 @@ struct pei_data int max_ddr3_freq; /* Disable self refresh */ int disable_self_refresh; + /* Disable cmd power/CKEPD */ + int disable_cmd_pwr; /* USB port configuration */ struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];