From 92955fbfa6571a6c1d35d8c14cd9f05c182ff82f Mon Sep 17 00:00:00 2001
From: John Su <john_su@compal.corp-partner.google.com>
Date: Mon, 28 Apr 2025 11:03:43 +0800
Subject: [PATCH] mb/google/trulo/var/uldrenite: Configure GPP_E9 as NF2

GPP_E9 was wrongly configured to NF1 instead of NF2 i.e. ISH_GP4.
Reference: Intel doc#648094

BUG=b:410645679
TEST=Check GPIO config in the OS.

Change-Id: I43e3ec2e29138d59ed82e5ff4b264ab8dc3a39fb
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87471
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yuval Peress <peress@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
---
 src/mainboard/google/brya/variants/uldrenite/gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/google/brya/variants/uldrenite/gpio.c b/src/mainboard/google/brya/variants/uldrenite/gpio.c
index d9ace37526..d453adb181 100644
--- a/src/mainboard/google/brya/variants/uldrenite/gpio.c
+++ b/src/mainboard/google/brya/variants/uldrenite/gpio.c
@@ -177,7 +177,7 @@ static const struct pad_config gpio_table[] = {
 	/* E8  : GPP_E8 ==> WLAN_DISABLE_L */
 	PAD_CFG_GPO(GPP_E8, 1, DEEP),
 	/* E9  : GPP_E9 ==> SOC_ACC2_INT# */
-	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF2),
 	/* E10 : NC */
 	PAD_NC_LOCK(GPP_E10, NONE, LOCK_CONFIG),
 	/* E11 : NC */