From 912161e52de644eb1ede751620adef50651e10a7 Mon Sep 17 00:00:00 2001 From: Hualin Wei Date: Thu, 19 Jun 2025 19:05:13 +0800 Subject: [PATCH] spd/lp4x: Modify parameters of SPD for NT6AP1024F32BL-J1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the latest SPD parameters provided by the manufacturer, combined with the document 8Gb_LPDDR4X_B_Die_component_Datasheet(S).pdf we correct channelsPerDie, diesPerPackage, ranksPerChannel of SPD for Nanya NT6AP1024F32BL-J1; merged the parameters into the BIOS and flashed it into the machine. The machine can boot and read the normal size of memory. BUG=b.422906387 TEST=util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x Use the dmidecode -t memory command to read the size of memory. Output results： awasuki-rev2 # dmidecode -t memory # dmidecode 3.4 Getting SMBIOS data from sysfs. SMBIOS 3.0 present. Handle 0x000A, DMI type 16, 23 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 64 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x000B, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 32 bits Data Width: 32 bits Size: 8 GB Form Factor: Unknown Set: None Locator: Channel-0-DIMM-0 Bank Locator: BANK 0 Type: LPDDR4 Type Detail: Synchronous Speed: 2933 MT/s Manufacturer: Unknown (b03) Serial Number: 00000000 Asset Tag: Not Specified Part Number: NT6AP1024F32BL-J1 Rank: 2 Configured Memory Speed: 2933 MT/s Minimum Voltage: 0.6 V Maximum Voltage: 0.6 V Configured Voltage: 0.6 V Change-Id: I35823ce87b5d8d67894528e4a8781dd91247eb6c Signed-off-by: Hualin Wei Reviewed-on: https://review.coreboot.org/c/coreboot/+/88146 Reviewed-by: Weimin Wu Reviewed-by: Paul Menzel Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- spd/lp4x/memory_parts.json | 6 +++--- spd/lp4x/set-0/spd-9.hex | 2 +- spd/lp4x/set-1/spd-12.hex | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/spd/lp4x/memory_parts.json b/spd/lp4x/memory_parts.json index fc3fd83c1e..094dcf3c96 100644 --- a/spd/lp4x/memory_parts.json +++ b/spd/lp4x/memory_parts.json @@ -429,10 +429,10 @@ "attribs": { "densityPerChannelGb": 8, "banks": 8, - "channelsPerDie": 4, - "diesPerPackage": 1, + "channelsPerDie": 2, + "diesPerPackage": 2, "bitWidthPerChannel": 16, - "ranksPerChannel": 1, + "ranksPerChannel": 2, "speedMbps": 4267, "tckMaxPs": 468, "casLatencies": "6 10 14 20 24 28 32 36" diff --git a/spd/lp4x/set-0/spd-9.hex b/spd/lp4x/set-0/spd-9.hex index 94a317f807..b4cdcf612f 100644 --- a/spd/lp4x/set-0/spd-9.hex +++ b/spd/lp4x/set-0/spd-9.hex @@ -1,4 +1,4 @@ -23 11 11 0E 15 21 B8 08 00 00 00 00 02 01 00 00 +23 11 11 0E 15 21 B4 08 00 00 00 00 0A 01 00 00 00 00 04 04 92 54 05 00 87 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/spd/lp4x/set-1/spd-12.hex b/spd/lp4x/set-1/spd-12.hex index e3d97d5c2f..014037a5d3 100644 --- a/spd/lp4x/set-1/spd-12.hex +++ b/spd/lp4x/set-1/spd-12.hex @@ -1,4 +1,4 @@ -23 11 11 0E 17 21 08 08 00 00 00 00 02 22 00 00 +23 11 11 0E 16 21 94 08 00 00 00 00 0A 22 00 00 00 00 04 04 92 54 05 00 87 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00