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mb/google/brya: Increase RW_SECTION_* by 256KB for 16MiB boards

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As the payload (depthcharge) is getting bigger for new features, the RW
CBFS sections for boards with 16MiB flash are not large enough.
Therefore, reduce RW_LEGACY from 1M to 512K, and increase each of
RW_SECTION_A and RW_SECTION_B by 256K.

NOTE: This is a RO/RW incompatible change, and should NEVER be
cherry-picked to firmware branches.

BUG=b:459853033
TEST=cq
BRANCH=none

Change-Id: If1b998e4ac8e5f00dee0b8afcf324c5f6bab697c
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90033
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Yu-Ping Wu 2025-11-14 01:59:11 +00:00 • committed by Subrata Banik
commit 91073f37d7
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/google/brya/chromeos-16MiB.fmd
View file

@ -4,12 +4,12 @@ FLASH 16M {
SI_ME
}
SI_BIOS 12672K {
RW_SECTION_A 3700K {
RW_SECTION_A 3956K {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
}
RW_LEGACY(CBFS) 1M
RW_LEGACY(CBFS) 512K
RW_MISC 152K {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
RECOVERY_MRC_CACHE 64K
@ -22,7 +22,7 @@ FLASH 16M {
RW_VPD(PRESERVE) 8K
RW_NVRAM(PRESERVE) 8K
}
RW_SECTION_B 3700K {
RW_SECTION_B 3956K {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64