diff --git a/mainboard/pcengines/alix1c/dts b/mainboard/pcengines/alix1c/dts index b9f2eab1a6..4bb3596403 100644 --- a/mainboard/pcengines/alix1c/dts +++ b/mainboard/pcengines/alix1c/dts @@ -27,10 +27,10 @@ }; domain@0 { /config/("northbridge/amd/geodelx/domain"); + /* Video RAM has to be in 2MB chunks. */ + geode_video_mb = "8"; pci@1,0 { /config/("northbridge/amd/geodelx/pci"); - /* Video RAM has to be in 2MB chunks. */ - geode_video_mb = "8"; }; pci@15,0 { /config/("southbridge/amd/cs5536/dts"); diff --git a/northbridge/amd/geodelx/domain b/northbridge/amd/geodelx/domain index 8e6d36a2ea..c04fcdbcfa 100644 --- a/northbridge/amd/geodelx/domain +++ b/northbridge/amd/geodelx/domain @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2008 Ronald G. Minnich + * Copyright (C) 2008 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,5 +21,8 @@ { device_operations = "geodelx_north_domain"; + + /* Video RAM has to be in 2MB chunks. */ + geode_video_mb = "0"; }; diff --git a/northbridge/amd/geodelx/geodelink.h b/northbridge/amd/geodelx/geodelink.h index 91fb687d88..6c294ea94c 100644 --- a/northbridge/amd/geodelx/geodelink.h +++ b/northbridge/amd/geodelx/geodelink.h @@ -73,6 +73,6 @@ static const struct gliutable gliu1table[] = { {.desc_name = GL_END,.desc_type = GL_END,.hi = 0x0,.lo = 0x0}, }; -static struct gliutable *gliutables[] = { gliu0table, gliu1table, 0 }; +static const struct gliutable *gliutables[] = { gliu0table, gliu1table, 0 }; #endif /* GEODELINK_H */ diff --git a/northbridge/amd/geodelx/geodelx.c b/northbridge/amd/geodelx/geodelx.c index b20d2786da..4033c6f732 100644 --- a/northbridge/amd/geodelx/geodelx.c +++ b/northbridge/amd/geodelx/geodelx.c @@ -31,7 +31,7 @@ /* Function prototypes */ extern void chipsetinit(void); extern void northbridge_init_early(void); -extern void graphics_init(struct northbridge_amd_geodelx_pci_config *nb_pci); +extern void graphics_init(u8 video_mb); extern u64 sizeram(void); /** @@ -49,9 +49,9 @@ static void enable_shadow(struct device *dev) * * @return TODO. */ -u64 get_systop(struct northbridge_amd_geodelx_pci_config *nb_pci) +u64 get_systop(struct northbridge_amd_geodelx_domain_config *nb_dm) { - struct gliutable *gl = NULL; + const struct gliutable *gl = NULL; u64 systop; struct msr msr; int i; @@ -68,7 +68,7 @@ u64 get_systop(struct northbridge_amd_geodelx_pci_config *nb_pci) systop += 4 * 1024; /* 4K */ } else { systop = - (((sizeram() - nb_pci->geode_video_mb) * 1024) - SMM_SIZE) * 1024; + (((sizeram() - nb_dm->geode_video_mb) * 1024) - SMM_SIZE) * 1024; } return systop; @@ -149,8 +149,8 @@ static void geodelx_pci_domain_set_resources(struct device *dev) { int idx; struct device *mc_dev; - struct northbridge_amd_geodelx_pci_config *nb_pci = - (struct northbridge_amd_geodelx_pci_config *)dev->device_configuration; + struct northbridge_amd_geodelx_domain_config *nb_dm = + (struct northbridge_amd_geodelx_domain_config *)dev->device_configuration; printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); @@ -162,7 +162,7 @@ static void geodelx_pci_domain_set_resources(struct device *dev) ram_resource(dev, idx++, 0, 640); /* 1 MB .. (Systop - 1 MB) (in KB) */ ram_resource(dev, idx++, 1024, - (get_systop(nb_pci)/1024) - 1024); + (get_systop(nb_dm)/1024) - 1024); } phase4_assign_resources(&dev->link[0]); @@ -182,8 +182,8 @@ static void geodelx_pci_domain_set_resources(struct device *dev) */ static void geodelx_pci_domain_phase2(struct device *dev) { - struct northbridge_amd_geodelx_pci_config *nb_pci = - (struct northbridge_amd_geodelx_pci_config *)dev->device_configuration; + struct northbridge_amd_geodelx_domain_config *nb_dm = + (struct northbridge_amd_geodelx_domain_config *)dev->device_configuration; void do_vsmbios(void); @@ -198,8 +198,8 @@ static void geodelx_pci_domain_phase2(struct device *dev) do_vsmbios(); printk(BIOS_SPEW, "After VSA:\n"); /* print_conf(); */ - - graphics_init(nb_pci); +printk(BIOS_DEBUG, "VRC_VG value: 0x%04x\n", nb_dm->geode_video_mb); + graphics_init((u8)nb_dm->geode_video_mb); pci_set_method(dev); } diff --git a/northbridge/amd/geodelx/geodelxinit.c b/northbridge/amd/geodelx/geodelxinit.c index a74cd64f32..8489672659 100644 --- a/northbridge/amd/geodelx/geodelxinit.c +++ b/northbridge/amd/geodelx/geodelxinit.c @@ -59,7 +59,7 @@ static struct msrinit geode_link_priority_table[] = { * * @param gl A GeodeLink table descriptor. */ -static void writeglmsr(struct gliutable *gl) +static void writeglmsr(const struct gliutable *gl) { struct msr msr; @@ -76,7 +76,7 @@ static void writeglmsr(struct gliutable *gl) * * @param gl A GeodeLink table descriptor. */ -static void ShadowInit(struct gliutable *gl) +static void ShadowInit(const struct gliutable *gl) { struct msr msr; @@ -134,7 +134,7 @@ int sizeram(void) * * @param gl A GeodeLink table descriptor. */ -static void sysmem_init(struct gliutable *gl) +static void sysmem_init(const struct gliutable *gl) { struct msr msr; int sizembytes, sizebytes; @@ -170,7 +170,7 @@ static void sysmem_init(struct gliutable *gl) * * @param gl A GeodeLink table descriptor. */ -static void SMMGL0Init(struct gliutable *gl) +static void SMMGL0Init(const struct gliutable *gl) { struct msr msr; int sizebytes = sizeram() << 20; @@ -201,7 +201,7 @@ static void SMMGL0Init(struct gliutable *gl) * * @param gl A GeodeLink table descriptor. */ -static void SMMGL1Init(struct gliutable *gl) +static void SMMGL1Init(const struct gliutable *gl) { struct msr msr; printk(BIOS_DEBUG, "%s:\n", __FUNCTION__); @@ -225,7 +225,7 @@ static void SMMGL1Init(struct gliutable *gl) * * @param gl A GeodeLink table descriptor. */ -static void GLIUInit(struct gliutable *gl) +static void GLIUInit(const struct gliutable *gl) { while (gl->desc_type != GL_END) { switch (gl->desc_type) { @@ -259,7 +259,7 @@ static void GLIUInit(struct gliutable *gl) */ static void GLPCI_init(void) { - struct gliutable *gl = NULL; + const struct gliutable *gl = NULL; struct msr msr; int i, enable_preempt, enable_cpu_override; int nic_grants_control, enable_bus_parking; @@ -545,7 +545,7 @@ static void set_shadow(u64 shadowSettings) { int i; struct msr msr; - struct gliutable *pTable; + const struct gliutable *pTable; u32 shadowLo, shadowHi; shadowLo = (u32) shadowSettings; @@ -612,7 +612,7 @@ static void rom_shadow_settings(void) static void enable_L1_cache(void) { int i; - struct gliutable *gl = NULL; + const struct gliutable *gl = NULL; struct msr msr; u8 SysMemCacheProp; diff --git a/northbridge/amd/geodelx/grphinit.c b/northbridge/amd/geodelx/grphinit.c index c23055b779..a06c9c63cf 100644 --- a/northbridge/amd/geodelx/grphinit.c +++ b/northbridge/amd/geodelx/grphinit.c @@ -26,7 +26,7 @@ /* * This function mirrors the Graphics_Init routine in GeodeROM. */ -void graphics_init(struct northbridge_amd_geodelx_pci_config *nb_pci) +void graphics_init(u8 video_mb) { u16 wClassIndex, wData, res; @@ -54,7 +54,7 @@ void graphics_init(struct northbridge_amd_geodelx_pci_config *nb_pci) */ wData = VG_CFG_DRIVER | VG_CFG_PRIORITY | - VG_CFG_DSCRT | (nb_pci->geode_video_mb & VG_MEM_MASK); + VG_CFG_DSCRT | (video_mb & VG_MEM_MASK); vr_write(wClassIndex, wData); res = vr_read(wClassIndex); diff --git a/northbridge/amd/geodelx/pci b/northbridge/amd/geodelx/pci index 4f12563a3f..3039ac0cca 100644 --- a/northbridge/amd/geodelx/pci +++ b/northbridge/amd/geodelx/pci @@ -2,7 +2,6 @@ * This file is part of the coreboot project. * * Copyright (C) 2008 Ronald G. Minnich - * Copyright (C) 2008 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,8 +20,5 @@ { device_operations = "geodelx_north_pci"; - - /* Video RAM has to be in 2MB chunks. */ - geode_video_mb = "0"; };