mb/google/bluey: Reset FCC limits during charge disable

When disabling slow battery charging, explicitly set the Fast Charge
Current (FCC) configuration to 0x8c (disable) for both SMB1 and SMB2
controllers.

This ensures that the PMIC charging registers are returned to a
neutral/safe state while disabling the charging.

BUG=b:481546101
TEST=Build and boot Bluey. Verified that SMB1/SMB2_CHGR_MAX_FCC_CFG
registers are cleared during the disable_slow_battery_charging call.

Change-Id: Ic5da492b097747dec88b117ac021759644b8b816
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91121
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2026-02-07 10:59:46 +00:00 committed by Matt DeVillier
commit 8f44a8acca

View file

@ -15,6 +15,7 @@
#define SMB2_CHGR_CHRG_EN_CMD ((SMB2_SLAVE_ID << 16) | SCHG_CHGR_CHARGING_ENABLE_CMD)
#define FCC_1A_STEP_50MA 0x14
#define FCC_DISABLE 0x8c
enum charging_status {
CHRG_DISABLE,
@ -71,4 +72,6 @@ void disable_slow_battery_charging(void)
printk(BIOS_INFO, "Disable slow charge support\n");
spmi_write8(SMB1_CHGR_CHRG_EN_CMD, CHRG_DISABLE);
spmi_write8(SMB2_CHGR_CHRG_EN_CMD, CHRG_DISABLE);
spmi_write8(SMB1_CHGR_MAX_FCC_CFG, FCC_DISABLE);
spmi_write8(SMB2_CHGR_MAX_FCC_CFG, FCC_DISABLE);
}