soc/mediatek/mt8189: Add DVFS driver

Add the initialization code for CPU Dynamic Voltage and Frequency
Scaling (DVFS) for MCUPM.

BUG=b:410763782
BRANCH=none
TEST=Check the CPU frequencies are changing and not fixed values by
using the following commands in kernel:
1) set policy*/scaling_governor as "ondemand"
"echo ondemand > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor"
"echo ondemand > /sys/devices/system/cpu/cpufreq/policy6/scaling_governor"
2) Check the CPU frequencies by repeating the command
"grep . /sys/devices/system/cpu/cpufreq/policy*/scaling_cur_freq"
The result is like
/sys/devices/system/cpu/cpufreq/policy0/scaling_cur_freq:650000
/sys/devices/system/cpu/cpufreq/policy6/scaling_cur_freq:2350000

Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
Change-Id: I001d7a02d86892478b456f1c5ab3a6433434a19b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87916
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/common/include/soc/symbols.h

@@ -9,6 +9,7 @@ DECLARE_REGION(dram_dma)
 DECLARE_REGION(resv_mem_optee)
 DECLARE_REGION(resv_mem_gpu)
 DECLARE_REGION(resv_mem_gpueb)
+DECLARE_REGION(dvfs2_reserved)
 DECLARE_OPTIONAL_REGION(mcufw_reserved)
 
 #endif /* _SOC_MEDIATEK_COMMON_SYMBOLS_H_ */

src/soc/mediatek/mt8189/Makefile.mk

@@ -20,6 +20,7 @@ romstage-y += ../common/cbmem.c
 romstage-y += ../common/cpu_id.c ../common/cpu_segment_id.c
 romstage-y += ../common/dram_init.c
 romstage-y += ../common/dramc_param.c
+romstage-y += dvfs.c
 romstage-y += ../common/emi.c
 romstage-y += ../common/memory.c ../common/memory_test.c
 romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c

src/soc/mediatek/mt8189/dvfs.c

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#include <arch/cache.h>
+#include <device/mmio.h>
+#include <soc/cpu_id.h>
+#include <soc/dvfs.h>
+#include <soc/symbols.h>
+
+void dvfs_init(void)
+{
+	u32 id, val;
+
+	id = get_cpu_segment_id();
+	val = (id << 8) | BIT(0);
+
+	write32(_dvfs2_reserved + 0x8, 0x55AA55AA);
+	write32(_dvfs2_reserved + 0xC, val);
+
+	dcache_clean_invalidate_by_mva(_dvfs2_reserved, 0x10);
+}

src/soc/mediatek/mt8189/include/soc/dvfs.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#ifndef __SOC_MEDIATEK_MT8189_INCLUDE_SOC_DVFS_H__
+#define __SOC_MEDIATEK_MT8189_INCLUDE_SOC_DVFS_H__
+
+#include <soc/dvfs_common.h>
+
+#endif /* __SOC_MEDIATEK_MT8189_INCLUDE_SOC_DVFS_H__ */