From 8ec0dc7356da2addf487f5a18f790ac0cb5395c9 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 28 Jan 2026 11:11:12 +0100 Subject: [PATCH] soc/intel/common/block/cpu/smmrelocate: Fix regression MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix regression introduced by commit d18cc50e6ab2 ("soc/intel/xeon_sp: Use common smm_relocate"). The MSR SMM_FEATURE_CONTROL_MSR is only implemented on client SoCs. Starting from Haswell server onwards the "SMM feature control" on server platforms resides on the UBOX in PCI space. Parallel SMM relocation was never supported on server platforms, thus disable parallel SMM relocation for now and thus fix booting on all Xeon-SP platforms. Added a FIXME to possibly implement this feature in the future. TEST=Can boot on OCP/tiogapass again. Change-Id: I7b4fbe633046acbf9f921cca722ff343a64962cd Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/90970 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Jérémy Compostella Reviewed-by: Maximilian Brune --- src/soc/intel/common/block/cpu/smmrelocate.c | 9 +++++++++ src/soc/intel/snowridge/include/soc/msr.h | 8 -------- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/src/soc/intel/common/block/cpu/smmrelocate.c b/src/soc/intel/common/block/cpu/smmrelocate.c index 8c45c218b2..e510c96f99 100644 --- a/src/soc/intel/common/block/cpu/smmrelocate.c +++ b/src/soc/intel/common/block/cpu/smmrelocate.c @@ -78,6 +78,15 @@ static int bsp_setup_msr_save_state(struct smm_relocation_params *relo_params) { msr_t smm_mca_cap; + /* + * FIXME: On Xeon-SP the MSR SMM_FEATURE_CONTROL_MSR is not implemented. + * SMM feature control resides on the UBOX PCI device. + * FIXME: Need to enable save state in MSRs on all sockets, however BSP + * runs on a single socket only. + */ + if (CONFIG(XEON_SP_COMMON_BASE) || CONFIG(SOC_INTEL_SNOWRIDGE)) + return 0; + smm_mca_cap = rdmsr(SMM_MCA_CAP_MSR); if (smm_mca_cap.hi & SMM_CPU_SVRSTR_MASK) { msr_t smm_feature_control; diff --git a/src/soc/intel/snowridge/include/soc/msr.h b/src/soc/intel/snowridge/include/soc/msr.h index b45050b794..45bf831290 100644 --- a/src/soc/intel/snowridge/include/soc/msr.h +++ b/src/soc/intel/snowridge/include/soc/msr.h @@ -5,14 +5,6 @@ #include -/** - * @brief Force serialized SMM relocation by hardcoding `SMM_CPU_SVRSTR` feature as not supported. - */ -#ifdef SMM_CPU_SVRSTR_MASK -#undef SMM_CPU_SVRSTR_MASK -#endif -#define SMM_CPU_SVRSTR_MASK 0 - #define MSR_BIOS_DONE 0x151 #define ENABLE_IA_UNTRUSTED BIT(0)