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soc/qualcomm/sc7{1,2}80: Increase early stages size for clang

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Clang builds slightly larger binaries so increase the section.

The qcsdi is used for an external blob that is currently not in use so
reducing the size is fine for now.

Change-Id: Ide01233f209613678c5408f1afab19415c1071be
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Arthur Heymans 2024-02-20 12:43:29 +01:00
commit 8eb59d8122
2 changed files with 6 additions and 6 deletions
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8
src/soc/qualcomm/sc7180/memlayout.ld
View file

@ -23,7 +23,7 @@ SECTIONS
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 112K)
REGION(qcsdi, 0x1469E000, 55K, 4K)
REGION(modem_id, 0x146ABD00, 4, 4)
SSRAM_END(0x146AE000)
@ -31,9 +31,9 @@ SECTIONS
BSRAM_START(0x14800000)
REGION(pbl_timestamps, 0x14800000, 83K, 4K)
WATCHDOG_TOMBSTONE(0x14814FFC, 4)
BOOTBLOCK(0x14815000, 48K)
TPM_LOG(0x14821000, 2K)
PRERAM_CBFS_CACHE(0x14821800, 60K)
BOOTBLOCK(0x14815000, 52K)
TPM_LOG(0x14822000, 2K)
PRERAM_CBFS_CACHE(0x14822800, 56K)
PRERAM_CBMEM_CONSOLE(0x14830800, 32K)
TIMESTAMP(0x14838800, 1K)
TTB(0x14839000, 56K)

4
src/soc/qualcomm/sc7280/memlayout.ld
View file

@ -25,8 +25,8 @@ SECTIONS
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K)
REGION(qcsdi, 0x1469A000, 44K, 4K)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 112K)
REGION(qcsdi, 0x1469C000, 39K + 256, 4K)
REGION(modem_id, 0x146A5D00, 4, 4)
SSRAM_END(0x146AB000)