From 8e6d45e0590a0713aa00989e764ee1f8850b48e9 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Wed, 1 Oct 2008 18:29:22 +0000 Subject: [PATCH] Minor fixes and improvements for v3, mostly for Kconfig files (trivial). - Coding style and whitespace fixes. - Remove obsolete comments, fix incorrect ones. - Use the full/canonical name of mainboards/vendors everywhere. - Update the list of USB Debug capable chipsets from http://www.coreboot.org/EHCI_Debug_Port. - s/LB/CB/ for the CONSOLE_PREFIX kconfig option. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://coreboot.org/repository/coreboot-v3@879 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- Kconfig | 8 ++--- arch/x86/Kconfig | 60 ++++++++++++++++++------------------- device/Kconfig | 19 +++++------- lib/Kconfig | 16 ++++++---- lib/console.c | 2 +- mainboard/Kconfig | 7 ++--- mainboard/amd/Kconfig | 2 +- mainboard/amp/Kconfig | 2 +- mainboard/gigabyte/Kconfig | 4 +-- mainboard/pcengines/Kconfig | 4 +-- 10 files changed, 62 insertions(+), 62 deletions(-) diff --git a/Kconfig b/Kconfig index 54ac6bb331..075199ab41 100644 --- a/Kconfig +++ b/Kconfig @@ -64,7 +64,7 @@ config WHOLE_PROGRAM_COMPILE bool "Enable whole-program optimizations (DANGEROUS)" depends EXPERT && EXPERIMENTAL help - Enable gcc -fwhole-program -combine for select code. + Enable 'gcc -fwhole-program -combine' for select code. Needs lots of annotation in stage1 and stage2. Works for initram only. This increases compile time (no parallel compilation possible @@ -111,8 +111,6 @@ config SUPERIO_FINTEK_F71805F config SUPERIO_ITE_IT8716F boolean -# Source all northbridge/southbridge/superio Kconfig files: - menu "Payload" config PAYLOAD_ELF_LOADER @@ -122,8 +120,8 @@ config PAYLOAD_ELF_LOADER This option allows an unparsed ELF paylaod to be added and loaded. choice - prompt "Payload type" - default PAYLOAD_NONE + prompt "Payload type" + default PAYLOAD_NONE config PAYLOAD_ELF bool "An ELF executable payload file" diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 3e4c433a66..685bc27146 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -60,62 +60,62 @@ config CONFIG_HPET boolean depends CPU_AMD_K8 help - Whether to configure a High Precision Event Timer. Note that HPETs are - known to be bug-prone. + Whether to configure a High Precision Event Timer (HPET). Note that + HPETs are known to be bug-prone. config K8_REV_F_SUPPORT hex default 0 if CPU_AMD_K8 help - Whether to include rev F support + Whether to include rev F support. config K8_SCAN_PCI_BUS hex default 0 if CPU_AMD_K8 help - Whether to scan the PCI bus in stage1 + Whether to scan the PCI bus in stage1. config K8_ALLOCATE_IO_RANGE hex default 0 if CPU_AMD_K8 help - Whether to allocate IO space in stage1 - + Whether to allocate I/O space in stage1. + config K8_ALLOCATE_MMIO_RANGE hex default 0 if CPU_AMD_K8 help - Whether to allocate MMIO space in stage1. - Comment from code: - Do we need allocate MMIO? Currently we direct - last 64M to southbridge link (sblink) only, - We can not lose access to last 4M range to ROM. - + Whether to allocate MMIO space in stage1. + + Comment from code: Do we need allocate MMIO? Currently we direct + last 64M to southbridge link (sblink) only. We can not lose access + to last 4M range to ROM. + config LOGICAL_CPUS hex depends CPU_AMD_K8 default 1 help - How many logical CPUs there are. Fix me. + How many logical CPUs there are. FIXME. config MAX_PHYSICAL_CPUS hex depends CPU_AMD_K8 default 1 help - Max number of physical CPUs (sockets) + Maximum number of physical CPUs (sockets). config MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED hex default 0 if CPU_AMD_K8 help - Config with 4 CPUs even if more are installed + Config with 4 CPUs even if more are installed. config CROSS_BAR_47_56 hex default 0 if CPU_AMD_K8 help - Configure for the type of crossbar on the mainboard. + Configure for the type of crossbar on the mainboard. config OPTION_TABLE boolean @@ -128,14 +128,14 @@ config PIRQ_TABLE boolean help This option is used to determine whether the mainboard has - a PIRQ table, which is the old way to set up interrupt routing. + a PIRQ table, which is the old way to set up interrupt routing. It is usually set in mainboard/*/Kconfig. config ACPI_TABLE boolean help This option is used to determine whether the mainboard has - an ACPI table. + an ACPI table. It is usually set in mainboard/*/Kconfig. config SMP @@ -143,9 +143,8 @@ config SMP depends CPU_I586 || CPU_AMD_K8 default 0 help - This option is used to enable certain functions to make - coreboot work correctly on symmetric multi processor - systems. + This option is used to enable certain functions to make coreboot + work correctly on symmetric multi processor systems. It is usually set in mainboard/*/Kconfig. config IOAPIC @@ -153,7 +152,7 @@ config IOAPIC depends ARCH_X86 && CPU_AMD_K8 default 0 help - If you want to configure an IOAPIC, set this. + If you want to configure an IOAPIC, set this. config CARBASE hex @@ -177,36 +176,37 @@ config CBMEMK default 0x1000 if CPU_AMD_GEODELX default 0x2000 if CPU_AMD_K8 help - This option sets the top of the memory area, in KiB, + This option sets the top of the memory area, in KiB, used for coreboot. config K8_HT_FREQ_1G_SUPPORT hex default 1 if CPU_AMD_K8 help - 1 Ghz. support. Opteron E0 or later can support - 1G HT, but still depends on the mainboard + 1 GHz support. Opteron E0 or later can support 1G HT, + but still depends on the mainboard. config HT_FREQ_800MHZ hex default 1 if CPU_AMD_K8 help - Can we run HT at 800 Mhz + Can we run HT at 800 MHz. config USBDEBUG_DIRECT boolean depends SOUTHBRIDGE_NVIDIA_MCP55 default 0 help - Determines if we enable USB Direct debugging. If you don't have a dongle, - this is probably of no value to you. + Determines if we enable USB Direct debugging. If you don't have + a dongle, this is probably of no value to you. config APIC_ID_OFFSET hex "APIC ID offset" default 0x10 depends IOAPIC help - This is entirely mainboard dependent. 0x10 is a *typical* setting but not always a good setting. + This is entirely mainboard dependent. 0x10 is a *typical* setting + but not always a good setting. menu "Debugging" @@ -214,6 +214,6 @@ config CARTEST bool "Test CAR area" default n help - Test the CAR area after it has been set up. + Test the CAR area after it has been set up. endmenu diff --git a/device/Kconfig b/device/Kconfig index 0d147e0b4d..ec2238a463 100644 --- a/device/Kconfig +++ b/device/Kconfig @@ -36,7 +36,6 @@ choice execute PCI option ROMs natively (32bit x86 system required), in an emulator (x86emu), or ignore option ROM execution. - config PCI_OPTION_ROM_RUN_X86EMU bool "x86emu" select PCI_OPTION_ROM_RUN @@ -47,7 +46,6 @@ config PCI_OPTION_ROM_RUN_X86EMU x86emu is slow, big and safe. All 16bit x86 code is executed in an encapsulated environment where it can not break out. - config PCI_OPTION_ROM_RUN_VM86 bool "vm86" select PCI_OPTION_ROM_RUN @@ -64,7 +62,6 @@ config PCI_OPTION_ROM_RUN_NONE bool "Disabled" help Do not execute PCI option ROMs at all. - If you choose this option, VGA plugin cards will not be initialized. endchoice @@ -74,7 +71,7 @@ config MULTIPLE_VGA_INIT bool "Initialize all VGA cards" depends PCI_OPTION_ROM_RUN help - If you enable this option, all VGA cards will be initialized + If you enable this option, all VGA cards will be initialized. If you disable this option, only the first VGA card will be initialized. @@ -82,7 +79,7 @@ config INITIALIZE_ONBOARD_VGA_FIRST bool "Initialize onboard VGA first" depends PCI_OPTION_ROM_RUN help - Initialize onboard VGA chips before any plugin VGA cards + Initialize onboard VGA chips before any plugin VGA cards are initialized. endmenu @@ -99,17 +96,17 @@ config PCI_64BIT_PREF_MEM bool "64 bit prefetchable memory addresses" depends CPU_AMD_K8 help - Enable support for 64-bit prefetchable memory addresses in PCI. + Enable support for 64-bit prefetchable memory addresses in PCI. config HW_MEM_HOLE_SIZEK hex "HW memory hole size in KB" depends CPU_AMD_K8 default 0x1000 help - Some chipsets support setting up a "hole" at the top of memory. It is essentially - a hole torn in the physical address space so that you can fit non-memory resources - (e.g. flash) at the top of the 4G address space. Given that this only happens on machines - with lots of memory, the default 4 MB is a very reasonable value. - + Some chipsets support setting up a "hole" at the top of memory. + It is essentially a hole torn in the physical address space so that + you can fit non-memory resources (e.g. flash) at the top of the 4G + address space. Given that this only happens on machines with lots + of memory, the default 4 MB is a very reasonable value. endmenu diff --git a/lib/Kconfig b/lib/Kconfig index af65f9dc50..897c8445b9 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -200,15 +200,21 @@ config CONSOLE_USB Debug Port capability. Controllers which are known to work: * 10b9:5239 ALi Corporation USB 2.0 (USB PCI card) - * 10de:0088 NVIDIA MCP2A - * 10de:005b NVIDIA CK804 - * 10de:036d NVIDIA MCP55 + * 8086:24cd Intel ICH4/ICH4-M * 8086:24dd Intel ICH5 * 8086:265c Intel ICH6 * 8086:268c Intel 631xESB/632xESB/3100 * 8086:27cc Intel ICH7 * 8086:2836 Intel ICH8 * 8086:283a Intel ICH8 + * 8086:293a Intel ICH9 + * 10de:0088 NVIDIA MCP2A + * 10de:005b NVIDIA CK804 + * 10de:026e NVIDIA MCP51 + * 10de:036d NVIDIA MCP55 + * 10de:03f2 NVIDIA MCP61 + * 1002:4386 ATI/AMD SB600 + * 1106:3104 VIA VX800 See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list. @@ -216,12 +222,12 @@ comment "Cosmetic console options" depends EXPERT && (CONSOLE_SERIAL || CONSOLE_USB) config CONSOLE_PREFIX - bool "Prefix all console output with '(LB)'" + bool "Prefix all console output with '(CB)'" depends EXPERT && (CONSOLE_SERIAL || CONSOLE_USB) default n help When you enable this option, coreboot will prefix each line of - console output with '(LB)'. + console output with '(CB)'. config CONSOLE_BUFFER boolean "Console memory buffer support" diff --git a/lib/console.c b/lib/console.c index d3707bb424..3e9bd0e63c 100644 --- a/lib/console.c +++ b/lib/console.c @@ -116,7 +116,7 @@ void console_tx_byte(unsigned char byte, void *arg) #ifdef CONFIG_CONSOLE_PREFIX uart8250_tx_byte(TTYSx_BASE, '\n'); uart8250_tx_byte(TTYSx_BASE, '('); - uart8250_tx_byte(TTYSx_BASE, 'L'); + uart8250_tx_byte(TTYSx_BASE, 'C'); uart8250_tx_byte(TTYSx_BASE, 'B'); uart8250_tx_byte(TTYSx_BASE, ')'); uart8250_tx_byte(TTYSx_BASE, ' '); diff --git a/mainboard/Kconfig b/mainboard/Kconfig index 0453841524..e15ba21eb7 100644 --- a/mainboard/Kconfig +++ b/mainboard/Kconfig @@ -40,8 +40,7 @@ config VENDOR_AMD config VENDOR_AMP bool "AMP" help - Select this option for various systems from - Advanced Micro Devices, Inc. + Select this option for various systems from AMP. config VENDOR_ARTECGROUP bool "Artec Group" @@ -49,9 +48,9 @@ config VENDOR_ARTECGROUP Select this option for various systems from the Artec Group. config VENDOR_GIGABYTE - bool "Gigabyte" + bool "GIGABYTE" help - Select this option for various systems from Gigabyte + Select this option for various systems from GIGABYTE. config VENDOR_EMULATION bool "Emulated systems" diff --git a/mainboard/amd/Kconfig b/mainboard/amd/Kconfig index cde0ae71a8..856b75c78c 100644 --- a/mainboard/amd/Kconfig +++ b/mainboard/amd/Kconfig @@ -56,7 +56,7 @@ config BOARD_AMD_SERENGETI select SUPERIO_WINBOND_W83627HF select IOAPIC help - AMD Serengeti + AMD Serengeti development board. endchoice diff --git a/mainboard/amp/Kconfig b/mainboard/amp/Kconfig index 9816a445c3..26b2cea756 100644 --- a/mainboard/amp/Kconfig +++ b/mainboard/amp/Kconfig @@ -33,7 +33,7 @@ config BOARD_AMP_TINYGX select SUPERIO_ITE_IT8716F select PIRQ_TABLE help - AMP TinyGX + AMP TinyGX board. endchoice diff --git a/mainboard/gigabyte/Kconfig b/mainboard/gigabyte/Kconfig index d82f54c84f..c4d7aa841c 100644 --- a/mainboard/gigabyte/Kconfig +++ b/mainboard/gigabyte/Kconfig @@ -24,7 +24,7 @@ choice depends on VENDOR_GIGABYTE config BOARD_GIGABYTE_M57SLI - bool "M57SLI" + bool "GA-M57SLI-S4" select ARCH_X86 select OPTION_TABLE select CPU_AMD_K8 @@ -33,7 +33,7 @@ config BOARD_GIGABYTE_M57SLI select SUPERIO_ITE_IT8716F select IOAPIC help - Gigabyte M57SLI + GIGABYTE GA-M57SLI-S4. endchoice diff --git a/mainboard/pcengines/Kconfig b/mainboard/pcengines/Kconfig index 595e3e5f56..1d04f0cf52 100644 --- a/mainboard/pcengines/Kconfig +++ b/mainboard/pcengines/Kconfig @@ -24,7 +24,7 @@ choice depends on VENDOR_PCENGINES config BOARD_PCENGINES_ALIX1C - bool "ALIX1.C" + bool "ALIX.1C" select ARCH_X86 select CPU_AMD_GEODELX select OPTION_TABLE @@ -33,7 +33,7 @@ config BOARD_PCENGINES_ALIX1C select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE help - PC Engines ALIX1.C. + PC Engines ALIX.1C. config BOARD_PCENGINES_ALIX2C3 bool "ALIX.2C3"