From 8e5e87a1cf4172177338909273dca2dfcf310cb5 Mon Sep 17 00:00:00 2001 From: Kilian Krause Date: Mon, 14 Jul 2025 15:16:13 +0200 Subject: [PATCH] mb/siemens/mc_rpl1: Configure CPU power limits to 28W TDP Set the CPU power limits configuration at the variant level to use 28W for PL1, PL2. Set PL4 to 64W. This ensures consistent thermal performance and power management behaviour. Change-Id: I355f12ad66e9682f3d50356028baea01b42bffa3 Signed-off-by: Kilian Krause Reviewed-on: https://review.coreboot.org/c/coreboot/+/88961 Reviewed-by: Mario Scheithauer Tested-by: build bot (Jenkins) --- .../siemens/mc_rpl/variants/mc_rpl1/overridetree.cb | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb index 9e8da22920..c57481fb41 100644 --- a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb +++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb @@ -3,6 +3,12 @@ chip soc/intel/alderlake # seen on J0 and Q0 SKUs register "disable_package_c_state_demotion" = "true" + register "power_limits_config[RPL_P_682_482_282_28W_CORE]" = "{ + .tdp_pl1_override = 28, + .tdp_pl2_override = 28, + .tdp_pl4 = 64, + }" + register "sata_salp_support" = "0" register "sata_speed" = "SATA_GEN2"