From 8dfef963fdf0c9362bb8b6712e1e93c75a1db65c Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sat, 31 Aug 2024 11:00:53 +0200 Subject: [PATCH] tree: Use boolean for lpss_s0ix_enable lpss_s0ix_enable is already defined as boolean: `git grep lpss_s0ix_enable $(find -type f -name "*.h") src/soc/intel/apollolake/chip.h: bool lpss_s0ix_enable;` Change-Id: I34bd568defe202daaad6136b9c184bc292a226b3 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/84160 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth Reviewed-by: Paul Menzel --- src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/reef/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/reef/variants/coral/devicetree.cb | 2 +- src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 +- src/mainboard/google/reef/variants/sand/devicetree.cb | 2 +- src/mainboard/google/reef/variants/snappy/devicetree.cb | 2 +- src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index c6bfe54e65..138499c884 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -52,7 +52,7 @@ chip soc/intel/apollolake register "slp_s3_assertion_width_usecs" = "28000" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # Enable DPTF register "dptf_enable" = "1" diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index 2b3f64c59c..1192a5f232 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -63,7 +63,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index 80060f19ba..df39932379 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -63,7 +63,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index a422b77774..022dc8b7e7 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -63,7 +63,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb index b6cf852710..f97614deb4 100644 --- a/src/mainboard/google/reef/variants/sand/devicetree.cb +++ b/src/mainboard/google/reef/variants/sand/devicetree.cb @@ -60,7 +60,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index c46ca6e295..fd30ce7bae 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -63,7 +63,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index 294d4680e2..7a46e1099a 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -64,7 +64,7 @@ chip soc/intel/apollolake register "hdaudio_bios_config_lockdown" = "1" # Enable lpss s0ix - register "lpss_s0ix_enable" = "1" + register "lpss_s0ix_enable" = "true" # GPE configuration # Note that GPE events called out in ASL code rely on this