UPSTREAM: intel/haswell: Add asmlinkage for romstage_after_car()

Change-Id: Ib3c973d2e89d4c25c3bf1e52662fbfcb4b1e4355
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/15789
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362765
Reviewed-by: Furquan Shaikh <furquan@chromium.org>

src/cpu/intel/haswell/haswell.h

@@ -183,7 +183,7 @@ void romstage_common(const struct romstage_params *params);
 void * asmlinkage romstage_main(unsigned long bist);
 /* romstage_after_car() is the C function called after cache-as-ram has
  * been torn down. It is responsible for loading the ramstage. */
-void romstage_after_car(void);
+void asmlinkage romstage_after_car(void);
 #endif
 
 #ifdef __SMM__

src/cpu/intel/haswell/romstage.c

@@ -259,7 +259,7 @@ void romstage_common(const struct romstage_params *params)
 	}
 }
 
-void romstage_after_car(void)
+void asmlinkage romstage_after_car(void)
 {
 	/* Load the ramstage. */
 	run_ramstage();