mb/*: Drop xhci_overcurrent_mapping for the easy ones
This is now copied from USBOCM1 built with main USB port config. Boards patched here have matching EHCI and xHCI overcurrent mappings. Change-Id: I36944e2f2ed265ee492019b75b7dd8b95ca26dbb Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
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28 changed files with 0 additions and 28 deletions
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@ -23,7 +23,6 @@ chip northbridge/intel/sandybridge
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x3f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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@ -35,7 +35,6 @@ chip northbridge/intel/sandybridge
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x3f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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@ -19,7 +19,6 @@ chip northbridge/intel/sandybridge
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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@ -25,7 +25,6 @@ chip northbridge/intel/sandybridge
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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device ref xhci on end
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@ -44,7 +44,6 @@ chip northbridge/intel/sandybridge # FIXME: check gfx
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# enable ONLY ports present on stock MintBox/Intense PC
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#register "sata_port_map" = "0x1d"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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@ -29,7 +29,6 @@ chip northbridge/intel/sandybridge
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device ref xhci on
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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end
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device ref gbe off end
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@ -29,7 +29,6 @@ chip northbridge/intel/sandybridge
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device ref xhci on
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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end
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device ref sata1 on
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@ -29,7 +29,6 @@ chip northbridge/intel/sandybridge
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device ref xhci on
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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end
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end
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@ -28,7 +28,6 @@ chip northbridge/intel/sandybridge
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}"
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device ref xhci on
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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end
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end
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@ -29,7 +29,6 @@ chip northbridge/intel/sandybridge
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device ref xhci on
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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end
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end
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@ -2,7 +2,6 @@ chip northbridge/intel/sandybridge
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device domain 0 on
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chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
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device ref mei1 off end
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register "xhci_overcurrent_mapping" = "0x00000c03"
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device ref pcie_rp2 on end
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device ref pcie_rp3 on
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device pci 00.0 on # PCI 1969:1091
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@ -14,7 +14,6 @@ chip northbridge/intel/sandybridge
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# 0x1: 2.5", 0x2: DVD, 0x4: mSATA
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register "sata_port_map" = "0x7"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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@ -8,7 +8,6 @@ chip northbridge/intel/sandybridge
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register "sata_port_map" = "0x3f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_switchable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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@ -8,7 +8,6 @@ chip northbridge/intel/sandybridge
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register "sata_port_map" = "0xf"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_switchable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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@ -21,7 +21,6 @@ chip northbridge/intel/sandybridge
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# HDD(0), ODD(1), mSATA(2), eSATA(4)
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register "sata_port_map" = "0x3f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{1, 1, 0}, /* SSP1: dock */
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@ -20,7 +20,6 @@ chip northbridge/intel/sandybridge
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register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
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register "sata_port_map" = "0x33"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{1, 1, 0},
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@ -21,7 +21,6 @@ chip northbridge/intel/sandybridge
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# HDD(0), ODD(1), mSATA(2), eSATA(4)
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register "sata_port_map" = "0x3f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 1, 0 },
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@ -22,7 +22,6 @@ chip northbridge/intel/sandybridge
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register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
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register "sata_port_map" = "0x1f"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{1, 1, 0}, /* Dock USB3.0 */
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@ -20,7 +20,6 @@ chip northbridge/intel/sandybridge
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register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
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register "sata_port_map" = "0x3"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{1, 1, 0}, /* SSP1: dock */
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@ -20,7 +20,6 @@ chip northbridge/intel/sandybridge
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register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
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register "sata_port_map" = "0x1"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 1, 0 },
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@ -32,7 +32,6 @@ chip northbridge/intel/sandybridge
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x5"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 1, 0 },
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@ -34,7 +34,6 @@ chip northbridge/intel/sandybridge
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# Do not enable xHCI Port 4 since WWAN USB is EHCI-only
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register "superspeed_capable_ports" = "0x7"
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register "xhci_switchable_ports" = "0x7"
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register "xhci_overcurrent_mapping" = "0x04000201"
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register "usb_port_config" = "{
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{ 1, 1, 0 },
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{ 1, 1, 1 },
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@ -43,7 +43,6 @@ chip northbridge/intel/sandybridge
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# Wire port 4 (wwan usb) to ehci for it lacks superspeed components
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register "xhci_switchable_ports" = "0x7"
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register "superspeed_capable_ports" = "0xf"
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register "xhci_overcurrent_mapping" = "0x4000201"
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# Enable zero-based linear PCIe root port functions
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register "pcie_port_coalesce" = "true"
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@ -42,7 +42,6 @@ chip northbridge/intel/sandybridge
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register "xhci_switchable_ports" = "0xf"
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register "superspeed_capable_ports" = "0xf"
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register "xhci_overcurrent_mapping" = "0x4000201"
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register "usb_port_config" = "{
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{0, 3, 0 }, /* P00 disconnected */
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{1, 1, 1 }, /* P01 left or right */
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@ -44,7 +44,6 @@ chip northbridge/intel/sandybridge
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# Do not enable xHCI Port 4 since WWAN USB is EHCI-only
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register "xhci_switchable_ports" = "0x7"
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register "superspeed_capable_ports" = "0x7"
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register "xhci_overcurrent_mapping" = "0x4000201"
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# Enable zero-based linear PCIe root port functions
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register "pcie_port_coalesce" = "true"
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@ -53,7 +53,6 @@ chip northbridge/intel/sandybridge
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register "pcie_port_coalesce" = "false"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
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register "xhci_overcurrent_mapping" = "0x00080401"
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register "xhci_switchable_ports" = "0x0f"
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register "superspeed_capable_ports" = "0x0f"
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register "usb_port_config" = "{
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@ -58,7 +58,6 @@ chip northbridge/intel/sandybridge
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register "pcie_port_coalesce" = "false"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 1, 1 }"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0f"
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register "superspeed_capable_ports" = "0x0f"
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register "usb_port_config" = "{
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@ -24,7 +24,6 @@ chip northbridge/intel/sandybridge
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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{ 1, 0, 0 },
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