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soc/mediatek/mt8189: Add SSPM loader

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Secure System Power Manager (SSPM) provides power control in secure
domain. The initialization flow is to load SSPM firmware to its SRAM
space and then enable it. It takes 19 ms to load sspm.bin.

coreboot logs:
CBFS: Found 'sspm.bin' @0x26740 size 0x645b in mcache @0xfffdd1ec
mtk_init_mcu: Loaded (and reset) sspm.bin in 19 msecs (59392 bytes)

BUG=b:379008996
BRANCH=none
TEST=build pass and see SSPM firmware loading log

Signed-off-by: Hailong Fan <hailong.fan@mediatek.corp-partner.google.com>
Change-Id: I9be0e7ee3d003b5ee9e07e4f136795755a11c5bc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87761
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
hailong.fan 2025-04-09 10:17:00 +08:00 • committed by Yidi Lin
commit 8d25cf3ae7
5 changed files with 14 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

6
src/soc/mediatek/mt8189/Kconfig
View file

@ -48,4 +48,10 @@ config SPM_FIRMWARE
help
The file name of the MediaTek SPM firmware.
config SSPM_FIRMWARE
string
default "sspm.bin"
help
The file name of the MediaTek SSPM firmware.
endif

4
src/soc/mediatek/mt8189/Makefile.mk
View file

@ -46,6 +46,7 @@ ramstage-y += ../common/pmif_spmi.c pmif_spmi.c
ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c ../common/rtc_osc_init.c
ramstage-y += soc.c
ramstage-y += ../common/spm.c ../common/spm_v2.c spm.c
ramstage-y += ../common/sspm.c ../common/sspm_sram.c
ramstage-y += ../common/usb.c usb.c
BL31_MAKEARGS += PLAT=mt8189
@ -59,7 +60,8 @@ firmware-files := \
$(CONFIG_DPM_DM_FIRMWARE) \
$(CONFIG_DPM_PM_FIRMWARE) \
$(CONFIG_MCUPM_FIRMWARE) \
$(CONFIG_SPM_FIRMWARE)
$(CONFIG_SPM_FIRMWARE) \
$(CONFIG_SSPM_FIRMWARE)
$(foreach fw, $(call strip_quotes,$(firmware-files)), \
$(eval $(fw)-file := $(MT8189_BLOB_DIR)/$(fw)) \

2
src/soc/mediatek/mt8189/include/soc/addressmap.h
View file

@ -117,6 +117,8 @@ enum {
VLP_CK_BASE = IO_PHYS + 0x0C012000,
PMICSPI_MST_BASE = IO_PHYS + 0x0C013000,
DEVAPC_VLP_AO_BASE = IO_PHYS + 0x0C018000,
SSPM_SRAM_BASE = IO_PHYS + 0x0C300000,
SSPM_CFG_BASE = IO_PHYS + 0x0C340000,
SCP_IIC_BASE = IO_PHYS + 0x0C80A000,
SCP_BASE = IO_PHYS + 0x0CB21000,
SPMI_MST_BASE = IO_PHYS + 0x0CC00000,

1
src/soc/mediatek/mt8189/include/soc/spm.h
View file

@ -1030,6 +1030,7 @@ check_member(mtk_spm_regs, ssusb_pwr_con, 0x0EA8);
check_member(mtk_spm_regs, cpueb_pwr_con, 0x0EB0);
check_member(mtk_spm_regs, mfg0_pwr_con, 0x0EB4);
check_member(mtk_spm_regs, mfg3_pwr_con, 0x0EC0);
check_member(mtk_spm_regs, sspm_sram_con, 0x0F04);
check_member(mtk_spm_regs, pwr_status, 0x0F40);
check_member(mtk_spm_regs, edp_tx_pwr_con, 0x0F70);

2
src/soc/mediatek/mt8189/soc.c
View file

@ -5,6 +5,7 @@
#include <soc/dramc_info.h>
#include <soc/emi.h>
#include <soc/mcupm.h>
#include <soc/sspm.h>
#include <symbols.h>
void bootmem_platform_add_ranges(void)
@ -20,6 +21,7 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev)
{
mcupm_init();
sspm_init();
}
static struct device_operations soc_ops = {