diff --git a/src/mainboard/google/brya/variants/gothrax/fw_config.c b/src/mainboard/google/brya/variants/gothrax/fw_config.c
index 54f6095772..4eed44cb25 100644
--- a/src/mainboard/google/brya/variants/gothrax/fw_config.c
+++ b/src/mainboard/google/brya/variants/gothrax/fw_config.c
@@ -28,7 +28,8 @@ static const struct pad_config wfc_disable_pads[] = {
 
 void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
 {
-	if (!fw_config_probe(FW_CONFIG(DB_USB, DB_C_A_LTE))) {
+	if (!(fw_config_probe(FW_CONFIG(DB_USB, DB_C_A_LTE)) ||
+		fw_config_probe(FW_CONFIG(DB_USB, DB_A_HDMI_LTE)))) {
 		printk(BIOS_INFO, "Disable LTE-related GPIO pins on gothrax.\n");
 		gpio_padbased_override(padbased_table, lte_disable_pads_gothrax,
 						ARRAY_SIZE(lte_disable_pads_gothrax));
diff --git a/src/mainboard/google/brya/variants/gothrax/gpio.c b/src/mainboard/google/brya/variants/gothrax/gpio.c
index 077c8506f7..ae236fbe1c 100644
--- a/src/mainboard/google/brya/variants/gothrax/gpio.c
+++ b/src/mainboard/google/brya/variants/gothrax/gpio.c
@@ -81,13 +81,6 @@ static const struct pad_config romstage_gpio_table[] = {
 	PAD_CFG_GPO(GPP_H20, 1, DEEP),
 };
 
-static const struct pad_config romstage_gpio_table_nontp[] = {
-	/* H12 : UART0_RTS# ==> SD_PERST_L */
-	PAD_CFG_GPO(GPP_H12, 1, DEEP),
-	/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
-	PAD_CFG_GPO(GPP_H20, 1, DEEP),
-};
-
 const struct pad_config *variant_gpio_override_table(size_t *num)
 {
 	*num = ARRAY_SIZE(override_gpio_table);
@@ -102,11 +95,6 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
 
 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 {
-	if (fw_config_probe(FW_CONFIG(TOUCH_PANEL, TOUCH_PANEL_DISABLE))) {
-		*num = ARRAY_SIZE(romstage_gpio_table_nontp);
-		return romstage_gpio_table_nontp;
-	} else {
-		*num = ARRAY_SIZE(romstage_gpio_table);
-		return romstage_gpio_table;
-	}
+	*num = ARRAY_SIZE(romstage_gpio_table);
+	return romstage_gpio_table;
 }
diff --git a/src/mainboard/google/brya/variants/gothrax/overridetree.cb b/src/mainboard/google/brya/variants/gothrax/overridetree.cb
index 49078fe6ed..2e81e89753 100644
--- a/src/mainboard/google/brya/variants/gothrax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gothrax/overridetree.cb
@@ -3,7 +3,7 @@ fw_config
 		option DB_NONE		0
 		option DB_C_A		1
 		option DB_C_A_LTE	2
-		option DB_A		3
+		option DB_A_HDMI_LTE		3
 	end
 	field THERMAL_SOLUTION 2
 		option THERMAL_SOLUTION_PASSIVE	0
@@ -25,8 +25,8 @@ fw_config
 		option WFC_ABSENT	1
 	end
 	field TOUCH_PANEL 9
-		option TOUCH_PANEL_ENABLE	0
-		option TOUCH_PANEL_DISABLE	1
+		option TOUCH_PANEL_I2C_HID	0
+		option TOUCH_PANEL_I2C_GENERIC	1
 	end
 end
 
@@ -231,7 +231,7 @@ chip soc/intel/alderlake
 				register "generic.has_power_resource" = "1"
 				register "hid_desc_reg_offset" = "0x01"
 				device i2c 0x10 on
-					probe TOUCH_PANEL TOUCH_PANEL_ENABLE
+					probe TOUCH_PANEL TOUCH_PANEL_I2C_HID
 				end
 			end
 			chip drivers/i2c/hid
@@ -249,7 +249,23 @@ chip soc/intel/alderlake
 				register "generic.has_power_resource" = "1"
 				register "hid_desc_reg_offset" = "0x01"
 				device i2c 0x41 on
-					probe TOUCH_PANEL TOUCH_PANEL_ENABLE
+					probe TOUCH_PANEL TOUCH_PANEL_I2C_HID
+				end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0001""
+				register "desc" = ""ELAN Touchscreen""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+				register "detect" = "1"
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+				register "reset_delay_ms" = "150"
+				register "reset_off_delay_ms" = "1"
+				register "enable_gpio" =
+							"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+				register "enable_delay_ms" = "6"
+				register "has_power_resource" = "1"
+				device i2c 10 on
+					probe TOUCH_PANEL TOUCH_PANEL_I2C_GENERIC
 				end
 			end
 		end
@@ -317,6 +333,7 @@ chip soc/intel/alderlake
 				register "input_analog_gain" = "3"
 				device i2c 28 on
 					probe DB_USB DB_C_A_LTE
+					probe DB_USB DB_A_HDMI_LTE
 				end
 			end
 		end
@@ -396,7 +413,10 @@ chip soc/intel/alderlake
 					chip drivers/intel/pmc_mux/conn
 						use usb2_port2 as usb2_port
 						use tcss_usb3_port2 as usb3_port
-						device generic 1 alias conn1 on end
+						device generic 1 alias conn1 on
+							probe DB_USB DB_C_A
+							probe DB_USB DB_C_A_LTE
+						end
 					end
 				end
 			end
@@ -469,6 +489,7 @@ chip soc/intel/alderlake
 						register "type" = "UPC_TYPE_INTERNAL"
 						device ref usb2_port5 on
 							probe DB_USB DB_C_A_LTE
+							probe DB_USB DB_A_HDMI_LTE
 						end
 					end
 					chip drivers/usb/acpi
@@ -516,6 +537,7 @@ chip soc/intel/alderlake
 						register "type" = "UPC_TYPE_INTERNAL"
 						device ref usb3_port3 on
 							probe DB_USB DB_C_A_LTE
+							probe DB_USB DB_A_HDMI_LTE
 						end
 					end
 				end
diff --git a/src/mainboard/google/brya/variants/gothrax/variant.c b/src/mainboard/google/brya/variants/gothrax/variant.c
index a1fdc2333b..8b8822bf4f 100644
--- a/src/mainboard/google/brya/variants/gothrax/variant.c
+++ b/src/mainboard/google/brya/variants/gothrax/variant.c
@@ -7,7 +7,8 @@
 
 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 {
-	if (!fw_config_probe(FW_CONFIG(DB_USB, DB_C_A_LTE))) {
+	if (!(fw_config_probe(FW_CONFIG(DB_USB, DB_C_A_LTE)) ||
+		fw_config_probe(FW_CONFIG(DB_USB, DB_A_HDMI_LTE)))) {
 		printk(BIOS_INFO, "Disable usb2_port5 and usb3_port3 of WWAN.\n");
 
 		config->usb2_ports[4].enable = 0;
@@ -33,7 +34,7 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 		config->usb2_ports[6].pre_emp_bit = USB2_HALF_BIT_PRE_EMP;
 	}
 
-	if (fw_config_probe(FW_CONFIG(DB_USB, DB_A))) {
+	if (fw_config_probe(FW_CONFIG(DB_USB, DB_A_HDMI_LTE))) {
 		printk(BIOS_INFO, "Disable typec aux_bias_pads in the SOC.\n");
 		config->typec_aux_bias_pads[1].pad_auxp_dc = 0x00;
 		config->typec_aux_bias_pads[1].pad_auxn_dc = 0x00;